[PATCH] drm/amd/display: Fix a gsl leak on dcn20

[Tianci Yin]

From: tiancyin <tianci.yin at amd.com>

[why]
When the new pipe_ctx holds a valid gsl_group, the old code logic will
overwrite it unconditionally, this cause the new pipe_ctx's gsl_group
have no chance to be released, i.e. the gsl_group leaked.

[how]
Don't overwrite the new pipe_ctx's gsl_group, if it holds a valid
gsl_group, meantime release the old_pipe_ctx's gsl_group.

Signed-off-by: tiancyin <tianci.yin at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index cf439ed270de..92ef58068b4b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1720,8 +1720,12 @@ void dcn20_program_front_end_for_ctx(
 		struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
 		struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
 
-		if (pipe_ctx->stream == old_pipe_ctx->stream)
-			pipe_ctx->stream_res.gsl_group = old_pipe_ctx->stream_res.gsl_group;
+		if (pipe_ctx->stream == old_pipe_ctx->stream) {
+			if (pipe_ctx->stream_res.gsl_group == 0)
+				pipe_ctx->stream_res.gsl_group = old_pipe_ctx->stream_res.gsl_group;
+			else if (old_pipe_ctx->stream_res.gsl_group >0)
+				dcn20_setup_gsl_group_as_lock(dc, old_pipe_ctx, false);
+		}
 	}
 
 	if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
-- 
2.25.1