[PATCH] drm/amdgpu: fix repeated words in comments
Robin Murphy
robin.murphy at arm.com
Wed Sep 7 14:54:57 UTC 2022
On 2022-09-07 12:34, Jilin Yuan wrote:
> Delete the redundant word 'and'.
> Delete the redundant word 'in'.
> Delete the redundant word 'the'.
> Delete the redundant word 'are'.
>
> Signed-off-by: Jilin Yuan <yuanjilin at cdjrlc.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index afaa1056e039..71367b9dd590 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -958,7 +958,7 @@ static void amdgpu_device_vram_scratch_fini(struct amdgpu_device *adev)
> * @registers: pointer to the register array
> * @array_size: size of the register array
> *
> - * Programs an array or registers with and and or masks.
Not redundant - the first "and" refers to the boolean operation, the
second is a conjunction. This is clear from the code if you look at it.
You could perhaps restyle the comment as "with AND and OR masks" to make
that stand out a bit better, but either way, please try to actually
understand the changes you're proposing.
Robin.
> + * Programs an array or registers with and or masks.
> * This is a helper for setting golden registers.
> */
> void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
> @@ -1569,7 +1569,7 @@ static int amdgpu_device_check_arguments(struct amdgpu_device *adev)
> * @state: vga_switcheroo state
> *
> * Callback for the switcheroo driver. Suspends or resumes the
> - * the asics before or after it is powered up using ACPI methods.
> + * asics before or after it is powered up using ACPI methods.
> */
> static void amdgpu_switcheroo_set_state(struct pci_dev *pdev,
> enum vga_switcheroo_state state)
> @@ -3203,7 +3203,7 @@ static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev)
> *
> * Main resume function for hardware IPs. The hardware IPs
> * are split into two resume functions because they are
> - * are also used in in recovering from a GPU reset and some additional
> + * also used in recovering from a GPU reset and some additional
> * steps need to be take between them. In this case (S3/S4) they are
> * run sequentially.
> * Returns 0 on success, negative error code on failure.
More information about the amd-gfx
mailing list