[PATCH 11/21] drm/amd/display: Round cursor width up for MALL allocation

[Christian König]

Am 07.09.22 um 20:11 schrieb Pavle Kotarac:
> From: Taimur Hassan <Syed.Hassan at amd.com>
>
> [Why & How]
> When calculating cursor size for MALL allocation, the cursor width should
> be the actual width rounded up to 64 alignment. Additionally, the bit
> depth should vary depending on color format.
>
> Reviewed-by: Alvin Lee <Alvin.Lee2 at amd.com>
> Acked-by: Pavle Kotarac <Pavle.Kotarac at amd.com>
> Signed-off-by: Taimur Hassan <Syed.Hassan at amd.com>
> ---
>   .../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c | 24 ++++++++++++++++++-
>   .../drm/amd/display/dc/dcn32/dcn32_hwseq.c    | 24 ++++++++++++++++++-
>   2 files changed, 46 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c
> index 6ec1c52535b9..2038cbda33f7 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c
> @@ -103,6 +103,11 @@ void hubp32_cursor_set_attributes(
>   	enum cursor_lines_per_chunk lpc = hubp2_get_lines_per_chunk(
>   			attr->width, attr->color_format);
>   
> +	//Round cursor width up to next multiple of 64

Please no // style comments in kernel code.

Regards,
Christian.

> +	uint32_t cursor_width = ((attr->width + 63) / 64) * 64;
> +	uint32_t cursor_height = attr->height;
> +	uint32_t cursor_size = cursor_width * cursor_height;
> +
>   	hubp->curs_attr = *attr;
>   
>   	REG_UPDATE(CURSOR_SURFACE_ADDRESS_HIGH,
> @@ -126,7 +131,24 @@ void hubp32_cursor_set_attributes(
>   			 /* used to shift the cursor chunk request deadline */
>   			CURSOR0_CHUNK_HDL_ADJUST, 3);
>   
> -	if (attr->width * attr->height * 4 > 16384)
> +	switch (attr->color_format) {
> +	case CURSOR_MODE_MONO:
> +		cursor_size /= 2;
> +		break;
> +	case CURSOR_MODE_COLOR_1BIT_AND:
> +	case CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA:
> +	case CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA:
> +		cursor_size *= 4;
> +		break;
> +
> +	case CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED:
> +	case CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED:
> +	default:
> +		cursor_size *= 8;
> +		break;
> +	}
> +
> +	if (cursor_size > 16384)
>   		REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, true);
>   	else
>   		REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, false);
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> index 769171ab8ef6..dbf2d7cc96c5 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> @@ -741,7 +741,29 @@ void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context)
>   		struct hubp *hubp = pipe->plane_res.hubp;
>   
>   		if (pipe->stream && pipe->plane_state && hubp && hubp->funcs->hubp_update_mall_sel) {
> -			if (hubp->curs_attr.width * hubp->curs_attr.height * 4 > 16384)
> +			//Round cursor width up to next multiple of 64
> +			int cursor_width = ((hubp->curs_attr.width + 63) / 64) * 64;
> +			int cursor_height = hubp->curs_attr.height;
> +			int cursor_size = cursor_width * cursor_height;
> +
> +			switch (hubp->curs_attr.color_format) {
> +			case CURSOR_MODE_MONO:
> +				cursor_size /= 2;
> +				break;
> +			case CURSOR_MODE_COLOR_1BIT_AND:
> +			case CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA:
> +			case CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA:
> +				cursor_size *= 4;
> +				break;
> +
> +			case CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED:
> +			case CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED:
> +			default:
> +				cursor_size *= 8;
> +				break;
> +			}
> +
> +			if (cursor_size > 16384)
>   				cache_cursor = true;
>   
>   			if (pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {