[PATCH v3] drm/amdgpu: change the alignment size of TMR BO to 1M

[Christian König]

1MiB still sounds like quite a lot. Is that really the hardware requirement?

On the other hand feel free to add my acked-by since it is certainly an 
improvement.

Christian.

Am 09.09.22 um 05:51 schrieb Zhang, Hawking:
>
> [AMD Official Use Only - General]
>
>
> Thanks Kevin!
>
> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
>
> Regards,
> Hawking
>
> *From: *Wang, Yang(Kevin) <KevinYang.Wang at amd.com>
> *Date: *Friday, September 9, 2022 at 11:50
> *To: *amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
> *Cc: *Zhang, Hawking <Hawking.Zhang at amd.com>, Wang, Yang(Kevin) 
> <KevinYang.Wang at amd.com>
> *Subject: *[PATCH v3] drm/amdgpu: change the alignment size of TMR BO 
> to 1M
>
> align TMR BO size TO tmr size is not necessary,
> modify the size to 1M to avoid re-create BO fail
> when serious VRAM fragmentation.
>
> v2:
> add new macro PSP_TMR_ALIGNMENT for TMR BO alignment size
>
> Signed-off-by: Yang Wang <KevinYang.Wang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
>  2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index cfcaf890a6a1..e430a3142310 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -766,7 +766,7 @@ static int psp_tmr_init(struct psp_context *psp)
>          }
>
>          pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
> -       ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, 
> PSP_TMR_SIZE(psp->adev),
> +       ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, 
> PSP_TMR_ALIGNMENT,
> AMDGPU_GEM_DOMAIN_VRAM,
> &psp->tmr_bo, &psp->tmr_mc_addr, pptr);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> index c32b74bd970f..e593e8c2a54d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> @@ -36,6 +36,7 @@
>  #define PSP_CMD_BUFFER_SIZE     0x1000
>  #define PSP_1_MEG               0x100000
>  #define PSP_TMR_SIZE(adev)      ((adev)->asic_type == CHIP_ALDEBARAN 
> ? 0x800000 : 0x400000)
> +#define PSP_TMR_ALIGNMENT      0x100000
>  #define PSP_FW_NAME_LEN         0x24
>
>  enum psp_shared_mem_size {
> -- 
> 2.25.1
>
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