[PATCH v2] drm/amdgpu: pass queue size and is_aql_queue to MES

[Felix Kuehling]

Am 2022-09-22 um 14:02 schrieb Graham Sider:
> Update mes_v11_api_def.h add_queue API with is_aql_queue parameter. Also
> re-use gds_size for the queue size (unused for KFD). MES requires the
> queue size in order to compute the actual wptr offset within the queue
> RB since it increases monotonically for AQL queues.
>
> v2: Make is_aql_queue assign clearer
>
> Signed-off-by: Graham Sider <Graham.Sider at amd.com>

Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>


> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h               | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mes_v11_0.c                | 4 ++++
>   drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 ++
>   drivers/gpu/drm/amd/include/mes_v11_api_def.h         | 3 ++-
>   4 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> index 7b46f6bf4187..ad980f4b66e1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> @@ -222,6 +222,8 @@ struct mes_add_queue_input {
>   	uint64_t	tba_addr;
>   	uint64_t	tma_addr;
>   	uint32_t	is_kfd_process;
> +	uint32_t	is_aql_queue;
> +	uint32_t	queue_size;
>   };
>   
>   struct mes_remove_queue_input {
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> index b64cd46a159a..5581e03fc956 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> @@ -187,6 +187,10 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
>   	mes_add_queue_pkt.is_kfd_process = input->is_kfd_process;
>   	mes_add_queue_pkt.trap_en = 1;
>   
> +	/* For KFD, gds_size is re-used for queue size (needed in MES for AQL queues) */
> +	mes_add_queue_pkt.is_aql_queue = input->is_aql_queue;
> +	mes_add_queue_pkt.gds_size = input->queue_size;
> +
>   	return mes_v11_0_submit_pkt_and_poll_completion(mes,
>   			&mes_add_queue_pkt, sizeof(mes_add_queue_pkt),
>   			offsetof(union MESAPI__ADD_QUEUE, api_status));
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index e83725a28106..007a3db69df1 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -205,6 +205,8 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
>   	}
>   
>   	queue_input.is_kfd_process = 1;
> +	queue_input.is_aql_queue = (q->properties.format == KFD_QUEUE_FORMAT_AQL);
> +	queue_input.queue_size = q->properties.queue_size >> 2;
>   
>   	queue_input.paging = false;
>   	queue_input.tba_addr = qpd->tba_addr;
> diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> index 50bfa513cb35..7e85cdc5bd34 100644
> --- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> +++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> @@ -269,7 +269,8 @@ union MESAPI__ADD_QUEUE {
>   			uint32_t map_kiq_utility_queue  : 1;
>   			uint32_t is_kfd_process		: 1;
>   			uint32_t trap_en		: 1;
> -			uint32_t reserved		: 21;
> +			uint32_t is_aql_queue		: 1;
> +			uint32_t reserved		: 20;
>   		};
>   		struct MES_API_STATUS		api_status;
>   		uint64_t                        tma_addr;