[PATCH] drm/amdgpu/vcn: update vcn4 fw shared data structure

[Leo Liu]

Reviewed-by: Leo Liu <leo.liu at amd.com>

On 2022-09-22 15:30, Ruijing Dong wrote:
> update VF_RB_SETUP_FLAG, add SMU_DPM_INTERFACE_FLAG,
> and corresponding change in VCN4.
>
> Signed-off-by: Ruijing Dong <ruijing.dong at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 8 +++++++-
>   drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c   | 4 ++++
>   2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index 80b7a6cfd026..253ea6b159df 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -161,7 +161,8 @@
>   #define AMDGPU_VCN_SW_RING_FLAG		(1 << 9)
>   #define AMDGPU_VCN_FW_LOGGING_FLAG	(1 << 10)
>   #define AMDGPU_VCN_SMU_VERSION_INFO_FLAG (1 << 11)
> -#define AMDGPU_VCN_VF_RB_SETUP_FLAG (1 << 12)
> +#define AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG (1 << 11)
> +#define AMDGPU_VCN_VF_RB_SETUP_FLAG (1 << 14)
>   
>   #define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER	0x00000001
>   #define AMDGPU_VCN_CMD_FLAG_MSG_BUFFER		0x00000001
> @@ -171,6 +172,9 @@
>   #define VCN_CODEC_DISABLE_MASK_HEVC (1 << 2)
>   #define VCN_CODEC_DISABLE_MASK_H264 (1 << 3)
>   
> +#define AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU (0)
> +#define AMDGPU_VCN_SMU_DPM_INTERFACE_APU (1)
> +
>   enum fw_queue_mode {
>   	FW_QUEUE_RING_RESET = 1,
>   	FW_QUEUE_DPG_HOLD_OFF = 2,
> @@ -335,7 +339,9 @@ struct amdgpu_vcn4_fw_shared {
>   	struct amdgpu_fw_shared_unified_queue_struct sq;
>   	uint8_t pad1[8];
>   	struct amdgpu_fw_shared_fw_logging fw_log;
> +	uint8_t pad2[20];
>   	struct amdgpu_fw_shared_rb_setup rb_setup;
> +	struct amdgpu_fw_shared_smu_interface_info smu_dpm_interface;
>   };
>   
>   struct amdgpu_vcn_fwlog {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index b6f73b87c47e..897a5ce9c9da 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -150,6 +150,10 @@ static int vcn_v4_0_sw_init(void *handle)
>   		fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
>   		fw_shared->sq.is_enabled = 1;
>   
> +		fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG);
> +		fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ?
> +			AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU;
> +
>   		if (amdgpu_sriov_vf(adev))
>   			fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG);
>