[PATCH 00/36] DC Patches September 26, 2022
Wheeler, Daniel
Daniel.Wheeler at amd.com
Fri Sep 30 14:01:20 UTC 2022
[AMD Official Use Only - General]
Hi all,
This week this patchset was tested on the following systems:
HP Envy 360, with Ryzen 5 4500U
Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U
Sapphire Pulse RX5700XT
Reference AMD RX6800
Engineering board with Ryzen 9 5900H
These systems were tested on the following display types:
eDP, (1080p 60hz [4500U, 5650U, 5900H])
VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA])
DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters])
MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays
DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
Changing display configurations and settings
Benchmark testing
Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
Script testing (scripts to automate some of the manual checks)
IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 9ab6a2850b486e5883418544eb5dc4012343744b -> drm/amd/display: Refactor LTTPR mode selection) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis).
Tested on Ubuntu 22.04
Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Mahfooz, Hamza <Hamza.Mahfooz at amd.com>
Sent: September 28, 2022 3:40 PM
To: amd-gfx at lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo at amd.com>; Li, Roman <Roman.Li at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Wang, Chao-kai (Stylon) <Stylon.Wang at amd.com>; Chiu, Solomon <Solomon.Chiu at amd.com>; Kotarac, Pavle <Pavle.Kotarac at amd.com>; Gutierrez, Agustin <Agustin.Gutierrez at amd.com>; Mahfooz, Hamza <Hamza.Mahfooz at amd.com>; Wheeler, Daniel <Daniel.Wheeler at amd.com>
Subject: [PATCH 00/36] DC Patches September 26, 2022
This DC patch-set brings improvements in multiple areas. In summary, we
highlight:
* ILR improvements;
* PSR fixes;
* DCN315 fixes;
* DCN32 fixes;
* ODM fixes;
* DSC fixes;
* SubVP fixes.
Cc: Daniel Wheeler <daniel.wheeler at amd.com>
Alvin Lee (3):
drm/amd/display: Block SubVP if rotation being used
drm/amd/display: Disable GSL when enabling phantom pipe
drm/amd/display: For SubVP pipe split case use min transition into MPO
Aric Cyr (3):
Revert "drm/amd/display: correct hostvm flag"
drm/amd/display: Fix vupdate and vline position calculation
drm/amd/display: 3.2.206
Charlene Liu (1):
drm/amd/display: prevent S4 test from failing
Dillon Varone (4):
drm/amd/display: Program SubVP in dc_commit_state_no_check
drm/amd/display: Reorder FCLK P-state switch sequence for DCN32
drm/amd/display: Increase compbuf size prior to updating clocks
drm/amd/display: Fix merging dynamic ODM+MPO configs on DCN32
Dmytro Laktyushkin (2):
drm/amd/display: add dummy pstate workaround to dcn315
drm/amd/display: fix dcn315 dml detile overestimation
Eric Bernstein (1):
drm/amd/display: Fix disable DSC logic in ghe DIO code
George Shen (1):
drm/amd/display: Add missing SDP registers to DCN32 reglist
Ian Chen (1):
drm/amd/display: Refactor edp ILR caps codes
Iswara Nagulendran (1):
drm/amd/display: Allow PSR exit when panel is disconnected
Leo (Hanghong) Ma (1):
drm/amd/display: AUX tracing cleanup
Leo Chen (1):
drm/amd/display: Add log for LTTPR
Leung, Martin (1):
drm/amd/display: unblock mcm_luts
Lewis Huang (1):
drm/amd/display: Keep OTG on when Z10 is disable
Martin Leung (1):
drm/amd/display: block odd h_total timings from halving pixel rate
Rodrigo Siqueira (10):
drm/amd/display: Drop unused code for DCN32/321
drm/amd/display: Update DCN321 hook that deals with pipe aquire
drm/amd/display: Fix SubVP control flow in the MPO context
drm/amd/display: Remove OPTC lock check
drm/amd/display: Adding missing HDMI ACP SEND register
drm/amd/display: Add PState change high hook for DCN32
drm/amd/display: Enable 2 to 1 ODM policy if supported
drm/amd/display: Disconnect DSC for unused pipes during ODM transition
drm/amd/display: update DSC for DCN32
drm/amd/display: Minor code style change
Wenjing Liu (3):
drm/amd/display: fix integer overflow during MSA V_Freq calculation
drm/amd/display: write all 4 bytes of FFE_PRESET dpcd value
drm/amd/display: Add missing mask sh for SYM32_TP_SQ_PULSE register
Zhikai Zhai (1):
drm/amd/display: skip commit minimal transition state
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 44 ++++-----
drivers/gpu/drm/amd/display/dc/core/dc.c | 91 ++++++++++++++++++-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 11 ++- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 70 ++++++++------
drivers/gpu/drm/amd/display/dc/dc.h | 3 +-
drivers/gpu/drm/amd/display/dc/dc_link.h | 4 +
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 13 +-- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 60 +++++------- .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 11 --- .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 1 -
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 25 +----
.../drm/amd/display/dc/dcn21/dcn21_hubbub.c | 8 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 13 ++- .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 1 - .../drm/amd/display/dc/dcn30/dcn30_resource.c | 4 +
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 4 +-
.../gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 1 - .../drm/amd/display/dc/dcn31/dcn31_resource.c | 15 ++-
.../amd/display/dc/dcn314/dcn314_resource.c | 13 ++-
.../amd/display/dc/dcn315/dcn315_resource.c | 15 ++-
.../amd/display/dc/dcn316/dcn316_resource.c | 13 ++-
.../display/dc/dcn32/dcn32_dio_link_encoder.c | 7 -- .../display/dc/dcn32/dcn32_dio_link_encoder.h | 4 -
.../dc/dcn32/dcn32_dio_stream_encoder.c | 57 +++++++-----
.../dc/dcn32/dcn32_dio_stream_encoder.h | 3 +
.../dc/dcn32/dcn32_hpo_dp_link_encoder.h | 1 +
.../drm/amd/display/dc/dcn32/dcn32_hubbub.c | 1 +
.../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c | 5 +-
.../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 37 +++++---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 24 +++++ .../drm/amd/display/dc/dcn32/dcn32_resource.h | 22 +++++ .../display/dc/dcn32/dcn32_resource_helpers.c | 88 ++++++++++++++++++
.../dc/dcn321/dcn321_dio_link_encoder.c | 1 -
.../amd/display/dc/dcn321/dcn321_resource.c | 4 +-
.../drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 91 +++++-------------- .../drm/amd/display/dc/dml/dcn31/dcn31_fpu.h | 1 +
.../dc/dml/dcn31/display_mode_vba_31.c | 15 +++
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 8 +-
.../dc/dml/dcn32/display_mode_vba_32.c | 19 ++--
.../drm/amd/display/dc/dml/display_mode_lib.c | 1 + .../drm/amd/display/dc/dml/display_mode_lib.h | 1 +
.../gpu/drm/amd/display/dc/inc/core_types.h | 2 +-
.../amd/display/dc/inc/hw/timing_generator.h | 1 -
43 files changed, 522 insertions(+), 291 deletions(-)
--
2.37.2
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