[PATCH 1/2] drm/amdgpu: Add MES KIQ dequeue in MES hw fini

[Chen, Horace]

[AMD Official Use Only - General]

Reviewed-By: Horace Chen <horace.chen at amd.com>

-----Original Message-----
From: Yifan Zha <Yifan.Zha at amd.com>
Sent: Wednesday, March 29, 2023 5:50 PM
To: amd-gfx at lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>
Cc: Chen, Horace <Horace.Chen at amd.com>; Chang, HaiJun <HaiJun.Chang at amd.com>; Zha, YiFan(Even) <Yifan.Zha at amd.com>
Subject: [PATCH 1/2] drm/amdgpu: Add MES KIQ dequeue in MES hw fini

[Why]
Need dequeue MES KIQ under SRIOV when unloading driver

[How]
Modify mes_v11_0_kiq_dequeue_sched which was used to dequeue MES SCHED to support veriable pipe.
Add MES KIQ dequeue in hw fini

Signed-off-by: Yifan Zha <Yifan.Zha at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 5826eac270d7..6e97c28e3162 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -1089,13 +1089,14 @@ static int mes_v11_0_sw_fini(void *handle)
        return 0;
 }

-static void mes_v11_0_kiq_dequeue_sched(struct amdgpu_device *adev)
+static void mes_v11_0_kiq_dequeue(struct amdgpu_ring *ring)
 {
        uint32_t data;
        int i;
+       struct amdgpu_device *adev = ring->adev;

        mutex_lock(&adev->srbm_mutex);
-       soc21_grbm_select(adev, 3, AMDGPU_MES_SCHED_PIPE, 0, 0);
+       soc21_grbm_select(adev, 3, ring->pipe, 0, 0);

        /* disable the queue if it's active */
        if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) { @@ -1121,8 +1122,6 @@ static void mes_v11_0_kiq_dequeue_sched(struct amdgpu_device *adev)

        soc21_grbm_select(adev, 0, 0, 0, 0);
        mutex_unlock(&adev->srbm_mutex);
-
-       adev->mes.ring.sched.ready = false;
 }

 static void mes_v11_0_kiq_setting(struct amdgpu_ring *ring) @@ -1176,8 +1175,14 @@ static int mes_v11_0_kiq_hw_init(struct amdgpu_device *adev)

 static int mes_v11_0_kiq_hw_fini(struct amdgpu_device *adev)  {
-       if (adev->mes.ring.sched.ready)
-               mes_v11_0_kiq_dequeue_sched(adev);
+       if (adev->mes.ring.sched.ready) {
+               mes_v11_0_kiq_dequeue(&adev->mes.ring);
+               adev->mes.ring.sched.ready = false;
+       }
+
+       if (amdgpu_sriov_vf(adev)) {
+               mes_v11_0_kiq_dequeue(&adev->gfx.kiq.ring);
+       }

        if (!amdgpu_sriov_vf(adev))
                mes_v11_0_enable(adev, false);
--
2.25.1