[PATCH] drm/amd/display : Log DP link training downspread info

[SHANMUGAM, SRINIVASAN]

[AMD Official Use Only - General]

Thanks a lot Aurabindo! much appreciate for your help in reviewing this patch.

Best regards,
Srini

-----Original Message-----
From: Pillai, Aurabindo <Aurabindo.Pillai at amd.com> 
Sent: Monday, April 10, 2023 6:39 PM
To: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM at amd.com>; Wentland, Harry <Harry.Wentland at amd.com>; Limonciello, Mario <Mario.Limonciello at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>
Cc: amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/display : Log DP link training downspread info



On 4/9/2023 3:21 PM, Srinivasan Shanmugam wrote:
> Update the existing log with DP LT downspread info:
> 
> [Downstream devices shall support down spreading of the link clock.
> The down-spread amplitude shall either be disabled (0.0%) or up to 
> 0.5%, as written by the upstream device to the DOWNSPREAD_CTRL 
> register (DPCD 00107h). The modulation frequency range shall be 30 to 
> 33 kHz]
> 
> Besides, fix checkpatch warning:
> 
> CHECK: Alignment should match open parenthesis
> 
> Cc: Mario Limonciello <mario.limonciello at amd.com>
> Cc: Harry Wentland <harry.wentland at amd.com>
> Cc: Leo Li <sunpeng.li at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> ---
>   .../display/dc/link/protocols/link_dp_training.c   | 14 ++++++++------
>   1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git 
> a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c 
> b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
> index 70fc0ddf2d7e..2d067a4a8517 100644
> --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
> +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
> @@ -1560,9 +1560,10 @@ bool perform_link_training_with_retries(
>   	j = 0;
>   	while (j < attempts && fail_count < (attempts * 10)) {
>   
> -		DC_LOG_HW_LINK_TRAINING("%s: Beginning link(%d) training attempt %u of %d @ rate(%d) x lane(%d)\n",
> -			__func__, link->link_index, (unsigned int)j + 1, attempts, cur_link_settings.link_rate,
> -			cur_link_settings.lane_count);
> +		DC_LOG_HW_LINK_TRAINING("%s: Beginning link(%d) training attempt %u of %d @ rate(%d) x lane(%d) @ spread = %x\n",
> +					__func__, link->link_index, (unsigned int)j + 1, attempts,
> +				       cur_link_settings.link_rate, cur_link_settings.lane_count,
> +				       cur_link_settings.link_spread);
>   
>   		dp_enable_link_phy(
>   			link,
> @@ -1640,9 +1641,10 @@ bool perform_link_training_with_retries(
>   				break;
>   		}
>   
> -		DC_LOG_WARNING("%s: Link(%d) training attempt %u of %d failed @ rate(%d) x lane(%d) : fail reason:(%d)\n",
> -			__func__, link->link_index, (unsigned int)j + 1, attempts, cur_link_settings.link_rate,
> -			cur_link_settings.lane_count, status);
> +		DC_LOG_WARNING("%s: Link(%d) training attempt %u of %d failed @ rate(%d) x lane(%d) @ spread = %x : fail reason:(%d)\n",
> +			       __func__, link->link_index, (unsigned int)j + 1, attempts,
> +			      cur_link_settings.link_rate, cur_link_settings.lane_count,
> +			      cur_link_settings.link_spread, status);
>   
>   		dp_disable_link_phy(link, &pipe_ctx->link_res, signal);
>   
> 

Reviewed-by: Aurabindo Pillai <aurabindo.pillai at amd.com>