[PATCH] drm/amdgpu: use sdma_v6 single packet invalidation
Deucher, Alexander
Alexander.Deucher at amd.com
Tue Apr 11 16:46:19 UTC 2023
[Public]
> -----Original Message-----
> From: YuBiao Wang <YuBiao.Wang at amd.com>
> Sent: Tuesday, April 11, 2023 3:17 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan at amd.com>; Chen, Horace
> <Horace.Chen at amd.com>; Tuikov, Luben <Luben.Tuikov at amd.com>;
> Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander
> <Alexander.Deucher at amd.com>; Zhang, Hawking
> <Hawking.Zhang at amd.com>; Liu, Monk <Monk.Liu at amd.com>; Xu, Feifei
> <Feifei.Xu at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>;
> Pelloux-Prayer, Pierre-Eric <Pierre-eric.Pelloux-prayer at amd.com>
> Subject: [PATCH] drm/amdgpu: use sdma_v6 single packet invalidation
>
> From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
>
> Send this patch on behalf of Pierre-Eric.
>
> This achieves the same result as the sequence used in emit_flush_gpu_tlb
> but the invalidation is now a single packet instead of the 3 packets required
> to implement reg_write_reg_wait.
>
> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-
> prayer at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 23
> ++++++++++++++++++++++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> index 3d36329be384..8d0c8f2cac06 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> @@ -1175,7 +1175,28 @@ static void
> sdma_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) static void
> sdma_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
> unsigned vmid, uint64_t pd_addr)
> {
> - amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);
> + struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs-
> >vmhub];
> + uint32_t req = hub->vmhub_funcs->get_invalidate_req(vmid, 0);
> +
> + /* Update the PD address for this VMID. */
> + amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 +
> + (hub->ctx_addr_distance * vmid),
> + lower_32_bits(pd_addr));
> + amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 +
> + (hub->ctx_addr_distance * vmid),
> + upper_32_bits(pd_addr));
> +
> + /* Trigger invalidation. */
> + amdgpu_ring_write(ring,
> +
> SDMA_PKT_VM_INVALIDATION_HEADER_OP(SDMA_OP_POLL_REGMEM) |
> +
> SDMA_PKT_VM_INVALIDATION_HEADER_SUB_OP(SDMA_SUBOP_VM_INV
> ALIDATION) |
> +
> SDMA_PKT_VM_INVALIDATION_HEADER_GFX_ENG_ID(ring->vm_inv_eng)
> |
> +
> SDMA_PKT_VM_INVALIDATION_HEADER_MM_ENG_ID(0x1f));
> + amdgpu_ring_write(ring, req);
> + amdgpu_ring_write(ring, 0xFFFFFFFF);
> + amdgpu_ring_write(ring,
> +
> SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_INVALIDATEACK(1 <<
> vmid) |
> +
> SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_ADDRESSRANGEHI(0x1
> F));
> }
>
> static void sdma_v6_0_ring_emit_wreg(struct amdgpu_ring *ring,
> --
> 2.40.0
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