drm/amdgpu/gfx9: change the reference clock for raven/raven2

Quan, Evan Evan.Quan at amd.com
Wed Apr 12 08:31:21 UTC 2023


[AMD Official Use Only - General]

Better to update the patch title with prefix as "drm/amdgpu:" instead of "drm/amdgpu/gfx9:".
Either way, the patch is Reviewed-by: Evan Quan <evan.quan at amd.com>

Evan
From: Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>
Sent: Wednesday, April 12, 2023 9:25 AM
To: amd-gfx at lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher at amd.com>; Quan, Evan <Evan.Quan at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>
Subject: drm/amdgpu/gfx9: change the reference clock for raven/raven2


[AMD Official Use Only - General]

    Due to switch to golden tsc register to get clock counter for raven/ raven2.
    Chang the reference clock from 25MHZ to 100MHZ.

    Signed-off-by: Jesse Zhang  Jesse.Zhang at amd.com<mailto:Jesse.Zhang at amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7d04c39332ad..0367a97c606b 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -301,11 +301,10 @@ static u32 soc15_get_xclk(struct amdgpu_device *adev)
        u32 reference_clock = adev->clock.spll.reference_freq;

        if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 0) ||
-           adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1))
-               return 10000;
-       if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 0) ||
+           adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1) ||
+           adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 0) ||
            adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 1))
-               return reference_clock / 4;
+               return 10000;

        return reference_clock;
}
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