[RFC PATCH 06/40] drm/amd/display: add 3D LUT driver-private props
Melissa Wen
mwen at igalia.com
Sun Apr 23 14:10:18 UTC 2023
Add CRTC 3D LUT for gamma correction using a 3D lookup table. A shaper
lut must be set to shape the content for a non-linear space. That
details should be handled by the driver according to HW color
capabilities.
Signed-off-by: Melissa Wen <mwen at igalia.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 14 +++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 11 ++++++++++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 13 ++++++++++++
.../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 20 +++++++++++++++++++
4 files changed, 58 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 44c22cb87dde..2abe5fe87c10 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1267,6 +1267,20 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev)
return -ENOMEM;
adev->mode_info.shaper_lut_size_property = prop;
+ prop = drm_property_create(adev_to_drm(adev),
+ DRM_MODE_PROP_BLOB,
+ "AMD_LUT3D", 0);
+ if (!prop)
+ return -ENOMEM;
+ adev->mode_info.lut3d_property = prop;
+
+ prop = drm_property_create_range(adev_to_drm(adev),
+ DRM_MODE_PROP_IMMUTABLE,
+ "AMD_LUT3D_SIZE", 0, UINT_MAX);
+ if (!prop)
+ return -ENOMEM;
+ adev->mode_info.lut3d_size_property = prop;
+
return 0;
}
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 1fd3497af3b5..205fa4f5bea7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -357,6 +357,17 @@ struct amdgpu_mode_info {
* post-blending shaper LUT as supported by the driver (read-only).
*/
struct drm_property *shaper_lut_size_property;
+ /**
+ * lut3d_property: CRTC property to set post-blending 3D LUT gamma
+ * correction; a shaper LUT can be used before applying 3D LUT to
+ * delinearize content.
+ */
+ struct drm_property *lut3d_property;
+ /**
+ * @lut3d_size_property: CRTC property for the size of post-blending 3D
+ * LUT as supported by the driver (read-only).
+ */
+ struct drm_property *lut3d_size_property;
#endif
};
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index de63455896cc..09c3e1858b56 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -742,6 +742,15 @@ struct dm_crtc_state {
* of &struct drm_color_lut.
*/
struct drm_property_blob *shaper_lut;
+ /**
+ * @lut3d:
+ *
+ * 3D Lookup table for converting pixel data. Position where it takes
+ * place depends on hw design, after @ctm or @gamma_lut. See
+ * drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array of
+ * &struct drm_color_lut.
+ */
+ struct drm_property_blob *lut3d;
#endif
};
@@ -804,6 +813,10 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
void amdgpu_dm_trigger_timing_sync(struct drm_device *dev);
+/* 3D LUT max size is 17x17x17 */
+#define MAX_COLOR_3DLUT_ENTRIES 4913
+#define MAX_COLOR_3DLUT_BITDEPTH 12
+/* 1D LUT degamma, regamma and shaper*/
#define MAX_COLOR_LUT_ENTRIES 4096
/* Legacy gamm LUT users such as X doesn't like large LUT sizes */
#define MAX_COLOR_LEGACY_LUT_ENTRIES 256
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index 503433e5cb38..0e1280228e6e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -231,6 +231,7 @@ static void dm_crtc_destroy_state(struct drm_crtc *crtc,
#ifdef CONFIG_STEAM_DECK
drm_property_blob_put(cur->shaper_lut);
+ drm_property_blob_put(cur->lut3d);
#endif
__drm_atomic_helper_crtc_destroy_state(state);
@@ -270,9 +271,12 @@ static struct drm_crtc_state *dm_crtc_duplicate_state(struct drm_crtc *crtc)
/* TODO Duplicate dc_stream after objects are stream object is flattened */
#ifdef CONFIG_STEAM_DECK
state->shaper_lut = cur->shaper_lut;
+ state->lut3d = cur->lut3d;
if (state->shaper_lut)
drm_property_blob_get(state->shaper_lut);
+ if (state->lut3d)
+ drm_property_blob_get(state->lut3d);
#endif
return &state->base;
}
@@ -326,6 +330,11 @@ dm_crtc_additional_color_mgmt(struct drm_crtc *crtc)
drm_object_attach_property(&crtc->base,
adev->mode_info.shaper_lut_size_property,
MAX_COLOR_LUT_ENTRIES);
+ drm_object_attach_property(&crtc->base,
+ adev->mode_info.lut3d_property, 0);
+ drm_object_attach_property(&crtc->base,
+ adev->mode_info.lut3d_size_property,
+ MAX_COLOR_3DLUT_ENTRIES);
}
}
@@ -381,6 +390,14 @@ amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,
&replaced);
acrtc_state->base.color_mgmt_changed |= replaced;
return ret;
+ } else if (property == adev->mode_info.lut3d_property) {
+ ret = atomic_replace_property_blob_from_id(crtc->dev,
+ &acrtc_state->lut3d,
+ val,
+ -1, sizeof(struct drm_color_lut),
+ &replaced);
+ acrtc_state->base.color_mgmt_changed |= replaced;
+ return ret;
} else {
drm_dbg_atomic(crtc->dev,
"[CRTC:%d:%s] unknown property [PROP:%d:%s]]\n",
@@ -404,6 +421,9 @@ amdgpu_dm_atomic_crtc_get_property(struct drm_crtc *crtc,
if (property == adev->mode_info.shaper_lut_property)
*val = (acrtc_state->shaper_lut) ?
acrtc_state->shaper_lut->base.id : 0;
+ else if (property == adev->mode_info.lut3d_property)
+ *val = (acrtc_state->lut3d) ?
+ acrtc_state->lut3d->base.id : 0;
else
return -EINVAL;
--
2.39.2
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