[PATCH 12/12] drm/amdgpu: put MQDs in VRAM
Alex Deucher
alexdeucher at gmail.com
Fri Apr 28 13:26:56 UTC 2023
On Fri, Apr 28, 2023 at 5:03 AM Christian König
<ckoenig.leichtzumerken at gmail.com> wrote:
>
> Am 27.04.23 um 17:27 schrieb Alex Deucher:
> > Reduces preemption latency.
> >
> > v2: move MES MQDs into VRAM as well (YuBiao)
> > v3: enable on gfx10, 11 only (Alex)
>
> The why we do that not for gfx9 is missing.
We could do it for gfx8-11. That said, gfx8 and 9 are working fine
and there's no reasons to change them at this point. Less chance for
regressions. I'll update the commit message.
>
> >
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4 ++++
> > drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 1 +
> > drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 1 +
> > 3 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > index 0560568b3925..92c5f0ce8bbb 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > @@ -382,6 +382,8 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
> > int r, i;
> > struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
> > struct amdgpu_ring *ring = &kiq->ring;
> > + u32 domain_vram = adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 0, 0) ?
> > + AMDGPU_GEM_DOMAIN_VRAM : 0;
>
> Maybe cleaner to do something like:
>
> domain = AMDGPU_GEM_DOMAIN_GTT;
> if (...)
> domain |= AMDGPU_GEM_DOMAIN_VRAM;
>
I can fix that up.
Thanks,
Alex
> Christian.
>
> >
> > /* create MQD for KIQ */
> > if (!adev->enable_mes_kiq && !ring->mqd_obj) {
> > @@ -413,6 +415,7 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
> > ring = &adev->gfx.gfx_ring[i];
> > if (!ring->mqd_obj) {
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
> > + domain_vram |
> > AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);
> > if (r) {
> > @@ -434,6 +437,7 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
> > ring = &adev->gfx.compute_ring[i + xcc_id * adev->gfx.num_compute_rings];
> > if (!ring->mqd_obj) {
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
> > + domain_vram |
> > AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);
> > if (r) {
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
> > index 0599f8a6813e..4560476c7c31 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
> > @@ -901,6 +901,7 @@ static int mes_v10_1_mqd_sw_init(struct amdgpu_device *adev,
> > return 0;
> >
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
> > + AMDGPU_GEM_DOMAIN_VRAM |
> > AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);
> > if (r) {
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> > index e853bcb892fc..3adb450eec07 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> > @@ -999,6 +999,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
> > return 0;
> >
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
> > + AMDGPU_GEM_DOMAIN_VRAM |
> > AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);
> > if (r) {
>
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