[PATCH 20/22] drm/amd/display: Fix backlight off cmd for OLED panel

Tom Chung chiahsuan.chung at amd.com
Wed Aug 2 06:51:30 UTC 2023


From: Swapnil Patel <swapnil.patel at amd.com>

[Why]
Currently driver fails to send backlight off command while
powering down.
This is because in dce110_edp_backlight_control, current backlight
status isn't being acccessed correctly for OLED panel with AUX control.

[How]
Add support for accessing current backlight status for OLED panels
with AUX control.

Cc: Mario Limonciello <mario.limonciello at amd.com>
Cc: Alex Deucher <alexander.deucher at amd.com>
Cc: stable at vger.kernel.org
Reviewed-by: Wenjing Liu <wenjing.liu at amd.com>
Acked-by: Tom Chung <chiahsuan.chung at amd.com>
Signed-off-by: Swapnil Patel <swapnil.patel at amd.com>
---
 .../display/dc/dce110/dce110_hw_sequencer.c   |  3 +--
 drivers/gpu/drm/amd/display/dc/inc/link.h     |  1 +
 .../drm/amd/display/dc/link/link_factory.c    |  1 +
 .../link/protocols/link_edp_panel_control.c   | 19 +++++++++++++++++++
 .../link/protocols/link_edp_panel_control.h   |  1 +
 5 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index bf2d7fbaccd7..e50da69a2b97 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -965,8 +965,7 @@ void dce110_edp_backlight_control(
 	}
 
 	if (link->panel_cntl) {
-		bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
-
+		bool is_backlight_on = ctx->dc->link_srv->edp_get_backlight_enable_status(link);
 		if ((enable && is_backlight_on) || (!enable && !is_backlight_on)) {
 			DC_LOG_HW_RESUME_S3(
 				"%s: panel already powered up/off. Do nothing.\n",
diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h
index f839494d59d8..dad730792a9a 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/link.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/link.h
@@ -273,6 +273,7 @@ struct link_service {
 	bool (*edp_is_ilr_optimization_required)(struct dc_link *link,
 			struct dc_crtc_timing *crtc_timing);
 	bool (*edp_backlight_enable_aux)(struct dc_link *link, bool enable);
+	bool (*edp_get_backlight_enable_status)(struct dc_link *link);
 	void (*edp_add_delay_for_T9)(struct dc_link *link);
 	bool (*edp_receiver_ready_T9)(struct dc_link *link);
 	bool (*edp_receiver_ready_T7)(struct dc_link *link);
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index ac1c3e2e7c1d..cab68b5c80f3 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -211,6 +211,7 @@ static void construct_link_service_edp_panel_control(struct link_service *link_s
 	link_srv->edp_is_ilr_optimization_required =
 			edp_is_ilr_optimization_required;
 	link_srv->edp_backlight_enable_aux = edp_backlight_enable_aux;
+	link_srv->edp_get_backlight_enable_status = edp_get_backlight_enable_status;
 	link_srv->edp_add_delay_for_T9 = edp_add_delay_for_T9;
 	link_srv->edp_receiver_ready_T9 = edp_receiver_ready_T9;
 	link_srv->edp_receiver_ready_T7 = edp_receiver_ready_T7;
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 8b360c09e0e8..adebcef00e74 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -243,6 +243,25 @@ bool edp_backlight_enable_aux(struct dc_link *link, bool enable)
 	return true;
 }
 
+bool edp_get_backlight_enable_status(struct dc_link *link)
+{
+	uint8_t backlight_status = 0;
+
+	if (!link || (link->connector_signal != SIGNAL_TYPE_EDP &&
+		link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
+		return false;
+
+	if (link->dpcd_sink_ext_caps.bits.oled ||
+		link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
+		link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1) {
+		if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_ENABLE,
+			&backlight_status, 1) != DC_OK)
+			return false;
+		return (backlight_status > 0);
+	} else
+		return link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
+}
+
 // we read default from 0x320 because we expect BIOS wrote it there
 // regular get_backlight_nit reads from panel set at 0x326
 static bool read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits)
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
index fa89bdb3a336..f2ab8799ddf1 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
@@ -57,6 +57,7 @@ bool edp_wait_for_t12(struct dc_link *link);
 bool edp_is_ilr_optimization_required(struct dc_link *link,
        struct dc_crtc_timing *crtc_timing);
 bool edp_backlight_enable_aux(struct dc_link *link, bool enable);
+bool edp_get_backlight_enable_status(struct dc_link *link);
 void edp_add_delay_for_T9(struct dc_link *link);
 bool edp_receiver_ready_T9(struct dc_link *link);
 bool edp_receiver_ready_T7(struct dc_link *link);
-- 
2.25.1



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