[PATCH] drm/amdgpu: add support to create large TMR BO for APU
Yu, Lang
Lang.Yu at amd.com
Thu Aug 3 16:11:38 UTC 2023
[Public]
Good. You can just send that to amd gfx list directly.
Regards,
Lang
________________________________
发件人: Paneer Selvam, Arunpravin <Arunpravin.PaneerSelvam at amd.com>
发送时间: Friday, August 4, 2023 12:01:08 AM
收件人: Yu, Lang <Lang.Yu at amd.com>; amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
抄送: Koenig, Christian <Christian.Koenig at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>
主题: Re: [PATCH] drm/amdgpu: add support to create large TMR BO for APU
Hi Lang,
This is not the right method to allocate memory if you dont have a specific offset for TMR. I will send a patch for your testing in drm buddy
which could fix this problem.
Regards,
Arun.
On 8/3/2023 8:58 PM, Yu, Lang wrote:
[Public]
Ping
________________________________
发件人: Yu, Lang <Lang.Yu at amd.com><mailto:Lang.Yu at amd.com>
发送时间: Tuesday, August 1, 2023 3:38:32 PM
收件人: amd-gfx at lists.freedesktop.org<mailto:amd-gfx at lists.freedesktop.org> <amd-gfx at lists.freedesktop.org><mailto:amd-gfx at lists.freedesktop.org>
抄送: Koenig, Christian <Christian.Koenig at amd.com><mailto:Christian.Koenig at amd.com>; Paneer Selvam, Arunpravin <Arunpravin.PaneerSelvam at amd.com><mailto:Arunpravin.PaneerSelvam at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com><mailto:Yifan1.Zhang at amd.com>; Yu, Lang <Lang.Yu at amd.com><mailto:Lang.Yu at amd.com>
主题: [PATCH] drm/amdgpu: add support to create large TMR BO for APU
TMR requires physical contiguous memory, amdgpu_bo_create_kernel()
can't satisfy large(>128MB) physical contiguous memory allocation
request with default 512MB VRAM on APU.
When requested TMR size > 128MB, use amdgpu_bo_create_kernel_at()
to create the BO at offset 32MB with a step 1MB in the VRAM range.
Signed-off-by: Lang Yu <Lang.Yu at amd.com><mailto:Lang.Yu at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 38 +++++++++++++++++++++++--
1 file changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 15217e33b51d..3fadfaa63b2e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -783,6 +783,34 @@ static bool psp_boottime_tmr(struct psp_context *psp)
}
}
+static int psp_create_large_tmr_bo_for_apu(struct psp_context *psp,
+ int tmr_size,
+ void **cpu_addr)
+{
+ struct amdgpu_vram_mgr *mgr = &psp->adev->mman.vram_mgr;
+ uint32_t rounded_size = round_up(tmr_size, 0x100000);
+ uint32_t start = 0x2000000;
+ uint32_t step = 0x100000;
+ int ret = -ENOMEM;
+
+ for (; start + rounded_size <= mgr->manager.size &&
+ start + step <= mgr->manager.size; start += step) {
+
+ ret = amdgpu_bo_create_kernel_at(psp->adev, start, tmr_size,
+ &psp->tmr_bo, cpu_addr);
+ if (ret == -ENOMEM)
+ continue;
+ if (ret)
+ return ret;
+
+ psp->tmr_mc_addr = amdgpu_bo_gpu_offset(psp->tmr_bo);
+
+ break;
+ }
+
+ return ret;
+}
+
/* Set up Trusted Memory Region */
static int psp_tmr_init(struct psp_context *psp)
{
@@ -813,8 +841,13 @@ static int psp_tmr_init(struct psp_context *psp)
}
}
- if (!psp->tmr_bo) {
- pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
+ if (psp->tmr_bo)
+ return 0;
+
+ pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
+ if (psp->adev->flags & AMD_IS_APU && tmr_size > 0x8000000)
+ ret = psp_create_large_tmr_bo_for_apu(psp, tmr_size, pptr);
+ else
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,
PSP_TMR_ALIGNMENT,
AMDGPU_HAS_VRAM(psp->adev) ?
@@ -822,7 +855,6 @@ static int psp_tmr_init(struct psp_context *psp)
AMDGPU_GEM_DOMAIN_GTT,
&psp->tmr_bo, &psp->tmr_mc_addr,
pptr);
- }
return ret;
}
--
2.25.1
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