[PATCH] drm/amd/pm: update smu_v13_0_6 message vf flag

[Lazar, Lijo]

On 8/4/2023 3:51 PM, Yang Wang wrote:
> v1:
> Enable following message in vf mode.
> - PPSMC_MSG_GetMinGfxclkFreqquency
> - PPSMC_MSG_GetMaxGfxclkFreqquency
> - PPSMC_MSG_GetMinDpmFreq
> - PPSMC_MSG_GetMaxDpmFreq
> 
> these message will cause pp_dpm_* device node not work properly.
> 
> v2:
> the following message is disabled in VF mode. (since pmfw 85.69.0)
> - PPSMC_MSG_EnableAllSmuFeatures
> 
> Signed-off-by: Yang Wang <kevinyang.wang at amd.com>
> Acked-by: Hawking Zhang <Hawking.Zhang at amd.com>

Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>

Thanks,
Lijo

> ---
>   .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c  | 15 +++++++++------
>   1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> index 00eba3f950c6..c53c370d2a3f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> @@ -89,8 +89,8 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU
>   	MSG_MAP(TestMessage,			     PPSMC_MSG_TestMessage,			0),
>   	MSG_MAP(GetSmuVersion,			     PPSMC_MSG_GetSmuVersion,			1),
>   	MSG_MAP(GetDriverIfVersion,		     PPSMC_MSG_GetDriverIfVersion,		1),
> -	MSG_MAP(EnableAllSmuFeatures,		     PPSMC_MSG_EnableAllSmuFeatures,		1),
> -	MSG_MAP(DisableAllSmuFeatures,		     PPSMC_MSG_DisableAllSmuFeatures,		1),
> +	MSG_MAP(EnableAllSmuFeatures,		     PPSMC_MSG_EnableAllSmuFeatures,		0),
> +	MSG_MAP(DisableAllSmuFeatures,		     PPSMC_MSG_DisableAllSmuFeatures,		0),
>   	MSG_MAP(RequestI2cTransaction,		     PPSMC_MSG_RequestI2cTransaction,		0),
>   	MSG_MAP(GetMetricsTable,		     PPSMC_MSG_GetMetricsTable,			1),
>   	MSG_MAP(GetEnabledSmuFeaturesHigh,	     PPSMC_MSG_GetEnabledSmuFeaturesHigh,	1),
> @@ -101,8 +101,8 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU
>   	MSG_MAP(SetToolsDramAddrLow,		     PPSMC_MSG_SetToolsDramAddrLow,		0),
>   	MSG_MAP(SetSoftMinByFreq,		     PPSMC_MSG_SetSoftMinByFreq,		0),
>   	MSG_MAP(SetSoftMaxByFreq,		     PPSMC_MSG_SetSoftMaxByFreq,		0),
> -	MSG_MAP(GetMinDpmFreq,			     PPSMC_MSG_GetMinDpmFreq,			0),
> -	MSG_MAP(GetMaxDpmFreq,			     PPSMC_MSG_GetMaxDpmFreq,			0),
> +	MSG_MAP(GetMinDpmFreq,			     PPSMC_MSG_GetMinDpmFreq,			1),
> +	MSG_MAP(GetMaxDpmFreq,			     PPSMC_MSG_GetMaxDpmFreq,			1),
>   	MSG_MAP(GetDpmFreqByIndex,		     PPSMC_MSG_GetDpmFreqByIndex,		1),
>   	MSG_MAP(SetPptLimit,			     PPSMC_MSG_SetPptLimit,			0),
>   	MSG_MAP(GetPptLimit,			     PPSMC_MSG_GetPptLimit,			1),
> @@ -121,8 +121,8 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU
>   	MSG_MAP(EnableDeterminism,		     PPSMC_MSG_EnableDeterminism,		0),
>   	MSG_MAP(DisableDeterminism,		     PPSMC_MSG_DisableDeterminism,		0),
>   	MSG_MAP(GfxDriverResetRecovery,		     PPSMC_MSG_GfxDriverResetRecovery,		0),
> -	MSG_MAP(GetMinGfxclkFrequency,               PPSMC_MSG_GetMinGfxDpmFreq,                0),
> -	MSG_MAP(GetMaxGfxclkFrequency,               PPSMC_MSG_GetMaxGfxDpmFreq,                0),
> +	MSG_MAP(GetMinGfxclkFrequency,               PPSMC_MSG_GetMinGfxDpmFreq,                1),
> +	MSG_MAP(GetMaxGfxclkFrequency,               PPSMC_MSG_GetMaxGfxDpmFreq,                1),
>   	MSG_MAP(SetSoftMinGfxclk,                    PPSMC_MSG_SetSoftMinGfxClk,                0),
>   	MSG_MAP(SetSoftMaxGfxClk,                    PPSMC_MSG_SetSoftMaxGfxClk,                0),
>   	MSG_MAP(PrepareMp1ForUnload,                 PPSMC_MSG_PrepareForDriverUnload,          0),
> @@ -1386,6 +1386,9 @@ static int smu_v13_0_6_system_features_control(struct smu_context *smu,
>   	struct amdgpu_device *adev = smu->adev;
>   	int ret = 0;
>   
> +	if (amdgpu_sriov_vf(adev))
> +		return 0;
> +
>   	if (enable) {
>   		if (!(adev->flags & AMD_IS_APU))
>   			ret = smu_v13_0_system_features_control(smu, enable);