[PATCH] drm/amdgpu: Fix identation issues in 'kgd_gfx_v9_program_trap_handler_settings'

[Christian König]

Am 07.08.23 um 09:23 schrieb Srinivasan Shanmugam:
> Fixes the following:
>
> ERROR: code indent should use tabs where possible
> WARNING: please, no spaces at the start of a line
>
> Cc: Guchun Chen <guchun.chen at amd.com>
> Cc: Christian König <christian.koenig at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: "Pan, Xinhui" <Xinhui.Pan at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> index 28963726bc97..fa5ee96f8845 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> @@ -1133,9 +1133,9 @@ void kgd_gfx_v9_program_trap_handler_settings(struct amdgpu_device *adev,
>   	 * Program TBA registers
>   	 */
>   	WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_LO,
> -                        lower_32_bits(tba_addr >> 8));
> +			lower_32_bits(tba_addr >> 8));
>   	WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_HI,
> -                        upper_32_bits(tba_addr >> 8));
> +			upper_32_bits(tba_addr >> 8));
>   
>   	/*
>   	 * Program TMA registers