[PATCH 3/5] drm/amdgpu: Set flags to cancel all pending resets
Lijo Lazar
lijo.lazar at amd.com
Fri Aug 11 06:02:32 UTC 2023
If reset is already done as part of recovery, set flags to cancel all
pending work items in the reset domain. Also, drop unused functions.
Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +------
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 6 ------
2 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3e56ccb742bb..4aee867ec59f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5150,11 +5150,6 @@ static int amdgpu_device_suspend_display_audio(struct amdgpu_device *adev)
return 0;
}
-static inline void amdgpu_device_stop_pending_resets(struct amdgpu_device *adev)
-{
-
-}
-
/**
* amdgpu_device_gpu_recover - reset the asic and recover scheduler
*
@@ -5320,7 +5315,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
* Drop all pending non scheduler resets. Scheduler resets
* were already dropped during drm_sched_stop
*/
- amdgpu_device_stop_pending_resets(tmp_adev);
+ set_bit(AMDGPU_RESET_CANCEL_ALL, &reset_context->flags);
}
/* Actual ASIC resets if needed.*/
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
index d1393050d3ad..73d1f78d2b0e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
@@ -139,12 +139,6 @@ static inline void amdgpu_reset_put_reset_domain(struct amdgpu_reset_domain *dom
kref_put(&domain->refcount, amdgpu_reset_destroy_reset_domain);
}
-static inline bool amdgpu_reset_domain_schedule(struct amdgpu_reset_domain *domain,
- struct work_struct *work)
-{
- return queue_work(domain->wq, work);
-}
-
void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain);
void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain);
--
2.25.1
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