[V10 7/8] drm/amd/pm: enable Wifi RFI mitigation feature support for SMU13.0.0

Quan, Evan Evan.Quan at amd.com
Mon Aug 28 02:02:05 UTC 2023


[AMD Official Use Only - General]

> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar at amd.com>
> Sent: Friday, August 25, 2023 10:13 PM
> To: Quan, Evan <Evan.Quan at amd.com>; lenb at kernel.org;
> johannes at sipsolutions.net; davem at davemloft.net; edumazet at google.com;
> kuba at kernel.org; pabeni at redhat.com; Deucher, Alexander
> <Alexander.Deucher at amd.com>; rafael at kernel.org; Limonciello, Mario
> <Mario.Limonciello at amd.com>
> Cc: linux-kernel at vger.kernel.org; linux-acpi at vger.kernel.org; amd-
> gfx at lists.freedesktop.org; dri-devel at lists.freedesktop.org; linux-
> wireless at vger.kernel.org; netdev at vger.kernel.org
> Subject: Re: [V10 7/8] drm/amd/pm: enable Wifi RFI mitigation feature
> support for SMU13.0.0
>
>
>
> On 8/25/2023 2:08 PM, Evan Quan wrote:
> > Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature.
> >
> > Signed-off-by: Evan Quan <evan.quan at amd.com>
> > Reviewed-by: Mario Limonciello <mario.limonciello at amd.com>
> > ---
> >   drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h |  3 +
> >   drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h  |  3 +-
> >   drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h  |  3 +
> >   .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    |  9 +++
> >   .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 60
> +++++++++++++++++++
> >   5 files changed, 77 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> > b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> > index 60d595344c45..a081e6bb27c4 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
> > @@ -325,6 +325,7 @@ enum smu_table_id
> >     SMU_TABLE_PACE,
> >     SMU_TABLE_ECCINFO,
> >     SMU_TABLE_COMBO_PPTABLE,
> > +   SMU_TABLE_WIFIBAND,
> >     SMU_TABLE_COUNT,
> >   };
> >
> > @@ -1501,6 +1502,8 @@ enum smu_baco_seq {
> >                      __dst_size);                                      \
> >   })
> >
> > +#define HZ_IN_MHZ          1000000U
> > +
> >   #if !defined(SWSMU_CODE_LAYER_L2)
> && !defined(SWSMU_CODE_LAYER_L3)
> && !defined(SWSMU_CODE_LAYER_L4)
> >   int smu_get_power_limit(void *handle,
> >                     uint32_t *limit,
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> > b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> > index 297b70b9388f..5bbb60289a79 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> > @@ -245,7 +245,8 @@
> >     __SMU_DUMMY_MAP(AllowGpo),      \
> >     __SMU_DUMMY_MAP(Mode2Reset),    \
> >     __SMU_DUMMY_MAP(RequestI2cTransaction), \
> > -   __SMU_DUMMY_MAP(GetMetricsTable),
> > +   __SMU_DUMMY_MAP(GetMetricsTable), \
> > +   __SMU_DUMMY_MAP(EnableUCLKShadow),
> >
> >   #undef __SMU_DUMMY_MAP
> >   #define __SMU_DUMMY_MAP(type)     SMU_MSG_##type
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> > b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> > index 355c156d871a..dd70b56aa71e 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
> > @@ -299,5 +299,8 @@ int smu_v13_0_update_pcie_parameters(struct
> smu_context *smu,
> >                                  uint32_t pcie_gen_cap,
> >                                  uint32_t pcie_width_cap);
> >
> > +int smu_v13_0_enable_uclk_shadow(struct smu_context *smu,
> > +                            bool enablement);
> > +
> >   #endif
> >   #endif
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> > index 9b62b45ebb7f..6a5cb582aa92 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> > @@ -2472,3 +2472,12 @@ int smu_v13_0_update_pcie_parameters(struct
> > smu_context *smu,
> >
> >     return 0;
> >   }
> > +
> > +int smu_v13_0_enable_uclk_shadow(struct smu_context *smu,
> > +                            bool enablement)
> > +{
> > +   return smu_cmn_send_smc_msg_with_param(smu,
> > +                                          SMU_MSG_EnableUCLKShadow,
> > +                                          enablement,
> > +                                          NULL);
> > +}
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> > index 3d188616ba24..fd3ac18653ed 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> > @@ -154,6 +154,7 @@ static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
> >     MSG_MAP(AllowGpo,                       PPSMC_MSG_SetGpoAllow,
> 0),
> >     MSG_MAP(AllowIHHostInterrupt,
>       PPSMC_MSG_AllowIHHostInterrupt,       0),
> >     MSG_MAP(ReenableAcDcInterrupt,
>       PPSMC_MSG_ReenableAcDcInterrupt,       0),
> > +   MSG_MAP(EnableUCLKShadow,
>       PPSMC_MSG_EnableUCLKShadow,            0),
> >   };
> >
> >   static struct cmn2asic_mapping
> smu_v13_0_0_clk_map[SMU_CLK_COUNT] =
> > { @@ -237,6 +238,7 @@ static struct cmn2asic_mapping
> smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
> >     TAB_MAP(I2C_COMMANDS),
> >     TAB_MAP(ECCINFO),
> >     TAB_MAP(OVERDRIVE),
> > +   TAB_MAP(WIFIBAND),
> >   };
> >
> >   static struct cmn2asic_mapping
> > smu_v13_0_0_pwr_src_map[SMU_POWER_SOURCE_COUNT] = { @@ -
> 481,6 +483,9 @@ static int smu_v13_0_0_tables_init(struct smu_context
> *smu)
> >                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
> >     SMU_TABLE_INIT(tables, SMU_TABLE_ECCINFO,
> sizeof(EccInfoTable_t),
> >                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
> > +   SMU_TABLE_INIT(tables, SMU_TABLE_WIFIBAND,
> > +                  sizeof(WifiBandEntryTable_t), PAGE_SIZE,
> > +                  AMDGPU_GEM_DOMAIN_VRAM);
> >
> >     smu_table->metrics_table = kzalloc(sizeof(SmuMetricsExternal_t),
> GFP_KERNEL);
> >     if (!smu_table->metrics_table)
> > @@ -2593,6 +2598,58 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct
> smu_context *smu,
> >     return ret;
> >   }
> >
> > +static bool smu_v13_0_0_wbrf_support_check(struct smu_context *smu)
> {
> > +   struct amdgpu_device *adev = smu->adev;
> > +
> > +   switch (adev->ip_versions[MP1_HWIP][0]) {
> > +   case IP_VERSION(13, 0, 0):
> > +           return smu->smc_fw_version >= 0x004e6300;
> > +   case IP_VERSION(13, 0, 10):
> > +           return smu->smc_fw_version >= 0x00503300;
> > +   default:
> > +           return false;
> > +   }
> > +}
> > +
> > +static int smu_v13_0_0_set_wbrf_exclusion_ranges(struct smu_context
> *smu,
> > +                                            struct exclusion_range
> *exclusion_ranges) {
> > +   WifiBandEntryTable_t wifi_bands;
> > +   int valid_entries = 0;
> > +   int ret, i;
> > +
> > +   memset(&wifi_bands, 0, sizeof(wifi_bands));
> > +   for (i = 0; i < ARRAY_SIZE(wifi_bands.WifiBandEntry); i++) {
> > +           if (!exclusion_ranges[i].start &&
> > +               !exclusion_ranges[i].end)
> > +                   break;
> > +
> > +           /* PMFW expects the inputs to be in Mhz unit */
> > +           wifi_bands.WifiBandEntry[valid_entries].LowFreq =
> > +                   DIV_ROUND_DOWN_ULL(exclusion_ranges[i].start,
> HZ_IN_MHZ);
> > +           wifi_bands.WifiBandEntry[valid_entries++].HighFreq =
> > +                   DIV_ROUND_UP_ULL(exclusion_ranges[i].end,
> HZ_IN_MHZ);
> > +   }
> > +   wifi_bands.WifiBandEntryNum = valid_entries;
> > +
> > +   /*
> > +    * Per confirm with PMFW team, WifiBandEntryNum = 0
> > +    * is a valid setting. So, there should be no direct
> > +    * return on that.
> > +    */
> > +
> > +   ret = smu_cmn_update_table(smu,
> > +                              SMU_TABLE_WIFIBAND,
> > +                              0,
> > +                              (void *)(&wifi_bands),
> > +                              true);
> > +   if (ret)
> > +           dev_err(smu->adev->dev, "Failed to set wifiband!");
>
> As mentioned earlier, this doesn't look like a candidate for ERR level.
> For ex: the system will continue to work fine if the last request is for removal
> of certain bands (a device got disconnected). Even otherwise, there is a chance
> that the bands used by newly added device may not cause any interference.
> Same goes for patch 8.
Normally this should not happen unless some fatal error occurred on PMFW side.
The "dev_err" here will not gate the system running (see the implementation of ` smu_wbrf_delayed_work_handler`).
But I suppose I can downgrade this to "dev_warn".

Evan
>
> Thanks,
> Lijo
>
> > +
> > +   return ret;
> > +}
> > +
> >   static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
> >     .get_allowed_feature_mask =
> smu_v13_0_0_get_allowed_feature_mask,
> >     .set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
> > @@ -2672,6 +2729,9 @@ static const struct pptable_funcs
> smu_v13_0_0_ppt_funcs = {
> >     .send_hbm_bad_channel_flag =
> smu_v13_0_0_send_bad_mem_channel_flag,
> >     .gpo_control = smu_v13_0_gpo_control,
> >     .get_ecc_info = smu_v13_0_0_get_ecc_info,
> > +   .is_asic_wbrf_supported = smu_v13_0_0_wbrf_support_check,
> > +   .enable_uclk_shadow = smu_v13_0_enable_uclk_shadow,
> > +   .set_wbrf_exclusion_ranges =
> smu_v13_0_0_set_wbrf_exclusion_ranges,
> >   };
> >
> >   void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)


More information about the amd-gfx mailing list