[PATCH v2] drm/amd/display: fix hw rotated modes when PSR-SU is enabled

Mario Limonciello mario.limonciello at amd.com
Thu Dec 7 14:57:35 UTC 2023


On 12/7/2023 08:51, Hamza Mahfooz wrote:
> We currently don't support dirty rectangles on hardware rotated modes.
> So, if a user is using hardware rotated modes with PSR-SU enabled,
> use PSR-SU FFU for all rotated planes (including cursor planes).
> 
> Cc: stable at vger.kernel.org
> Fixes: 30ebe41582d1 ("drm/amd/display: add FB_DAMAGE_CLIPS support")
> Reported-by: Kai-Heng Feng <kai.heng.feng at canonical.com>
> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2952
> Tested-by: Kai-Heng Feng <kai.heng.feng at canonical.com>
> Tested-by: Bin Li <binli at gnome.org>
> Signed-off-by: Hamza Mahfooz <hamza.mahfooz at amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello at amd.com>
> ---
> v2: fix style issues and add tags
> ---
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c    |  3 +++
>   drivers/gpu/drm/amd/display/dc/dc_hw_types.h         |  1 +
>   drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c    | 12 ++++++++++--
>   .../gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c  |  3 ++-
>   4 files changed, 16 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index c146dc9cba92..3cd1d6a8fbdf 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -5217,6 +5217,9 @@ static void fill_dc_dirty_rects(struct drm_plane *plane,
>   	if (plane->type == DRM_PLANE_TYPE_CURSOR)
>   		return;
>   
> +	if (new_plane_state->rotation != DRM_MODE_ROTATE_0)
> +		goto ffu;
> +
>   	num_clips = drm_plane_get_damage_clips_count(new_plane_state);
>   	clips = drm_plane_get_damage_clips(new_plane_state);
>   
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
> index 9649934ea186..e2a3aa8812df 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
> @@ -465,6 +465,7 @@ struct dc_cursor_mi_param {
>   	struct fixed31_32 v_scale_ratio;
>   	enum dc_rotation_angle rotation;
>   	bool mirror;
> +	struct dc_stream_state *stream;
>   };
>   
>   /* IPP related types */
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
> index 139cf31d2e45..89c3bf0fe0c9 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
> @@ -1077,8 +1077,16 @@ void hubp2_cursor_set_position(
>   	if (src_y_offset < 0)
>   		src_y_offset = 0;
>   	/* Save necessary cursor info x, y position. w, h is saved in attribute func. */
> -	hubp->cur_rect.x = src_x_offset + param->viewport.x;
> -	hubp->cur_rect.y = src_y_offset + param->viewport.y;
> +	if (param->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
> +	    param->rotation != ROTATION_ANGLE_0) {
> +		hubp->cur_rect.x = 0;
> +		hubp->cur_rect.y = 0;
> +		hubp->cur_rect.w = param->stream->timing.h_addressable;
> +		hubp->cur_rect.h = param->stream->timing.v_addressable;
> +	} else {
> +		hubp->cur_rect.x = src_x_offset + param->viewport.x;
> +		hubp->cur_rect.y = src_y_offset + param->viewport.y;
> +	}
>   }
>   
>   void hubp2_clk_cntl(struct hubp *hubp, bool enable)
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
> index 2b8b8366538e..cdb903116eb7 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
> @@ -3417,7 +3417,8 @@ void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx)
>   		.h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz,
>   		.v_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.vert,
>   		.rotation = pipe_ctx->plane_state->rotation,
> -		.mirror = pipe_ctx->plane_state->horizontal_mirror
> +		.mirror = pipe_ctx->plane_state->horizontal_mirror,
> +		.stream = pipe_ctx->stream,
>   	};
>   	bool pipe_split_on = false;
>   	bool odm_combine_on = (pipe_ctx->next_odm_pipe != NULL) ||



More information about the amd-gfx mailing list