[PATCH 05/20] drm/amd/display: Add null pointer guards where needed
Rodrigo Siqueira
Rodrigo.Siqueira at amd.com
Wed Dec 20 16:33:37 UTC 2023
From: Josip Pavic <josip.pavic at amd.com>
[Why]
Some functions whose output is typically checked for null are not being
checked for null at several call sites, causing some static analysis
tools to throw an error.
[How]
Add null pointer guards around functions that typically have them at
other call sites.
Reviewed-by: Sung Lee <sung.lee at amd.com>
Reviewed-by: Aric Cyr <aric.cyr at amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira at amd.com>
Signed-off-by: Josip Pavic <josip.pavic at amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +++++
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index d55de3f5115d..b7c2eaebf8bf 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3379,6 +3379,9 @@ static void commit_planes_for_stream_fast(struct dc *dc,
&context->res_ctx,
stream);
+ if (!top_pipe_to_program)
+ return;
+
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
@@ -3978,6 +3981,8 @@ static struct dc_state *create_minimal_transition_state(struct dc *dc,
dc->debug.force_disable_subvp = true;
minimal_transition_context = dc_state_create_copy(base_context);
+ if (!minimal_transition_context)
+ return NULL;
/* commit minimal state */
if (dc->res_pool->funcs->validate_bandwidth(dc, minimal_transition_context, false)) {
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 716b59bd03b6..f2abc1096ffb 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -2460,6 +2460,9 @@ void resource_remove_otg_master_for_stream_output(struct dc_state *context,
struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(
&context->res_ctx, stream);
+ if (!otg_master)
+ return;
+
ASSERT(resource_get_odm_slice_count(otg_master) == 1);
ASSERT(otg_master->plane_state == NULL);
ASSERT(otg_master->stream_res.stream_enc);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index f2b265ed7fc2..54670e0b1518 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -447,7 +447,8 @@ bool dc_stream_add_writeback(struct dc *dc,
if (dc->hwss.enable_writeback) {
struct dc_stream_status *stream_status = dc_stream_get_status(stream);
struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
- dwb->otg_inst = stream_status->primary_otg_inst;
+ if (stream_status)
+ dwb->otg_inst = stream_status->primary_otg_inst;
}
if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
--
2.42.0
More information about the amd-gfx
mailing list