[PATCH 09/14] drm/amdgpu: move doorbell aperture handling into ttm_init
Christian König
christian.koenig at amd.com
Mon Feb 6 16:20:24 UTC 2023
Am 03.02.23 um 20:08 schrieb Shashank Sharma:
> From: Alex Deucher <alexander.deucher at amd.com>
>
> To consolidate it with vram handling.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Alex Deucher <shashank.sharma at amd.com>
I can't check all the implementation details, but from a mile high view
that looks correct.
Acked-by: Christian König <christian.koenig at amd.com>
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 96 ++--------------------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 64 +++++++++++++++
> 2 files changed, 71 insertions(+), 89 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index b07b7679bf9f..7c21ffe63ebc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1016,82 +1016,6 @@ int amdgpu_device_pci_reset(struct amdgpu_device *adev)
> return pci_reset_function(adev->pdev);
> }
>
> -/*
> - * GPU doorbell aperture helpers function.
> - */
> -/**
> - * amdgpu_device_doorbell_init - Init doorbell driver information.
> - *
> - * @adev: amdgpu_device pointer
> - *
> - * Init doorbell driver information (CIK)
> - * Returns 0 on success, error on failure.
> - */
> -static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> -{
> -
> - /* No doorbell on SI hardware generation */
> - if (adev->asic_type < CHIP_BONAIRE) {
> - adev->gmc.doorbell_aper_base = 0;
> - adev->gmc.doorbell_aper_size = 0;
> - adev->doorbell.num_doorbells = 0;
> - adev->mman.doorbell_aper_base_kaddr = NULL;
> - return 0;
> - }
> -
> - if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> - return -EINVAL;
> -
> - amdgpu_asic_init_doorbell_index(adev);
> -
> - /* doorbell bar mapping */
> - adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
> - adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
> -
> - if (adev->enable_mes) {
> - adev->doorbell.num_doorbells =
> - adev->gmc.doorbell_aper_size / sizeof(u32);
> - } else {
> - adev->doorbell.num_doorbells =
> - min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> - adev->doorbell_index.max_assignment+1);
> - if (adev->doorbell.num_doorbells == 0)
> - return -EINVAL;
> -
> - /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> - * paging queue doorbell use the second page. The
> - * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> - * doorbells are in the first page. So with paging queue enabled,
> - * the max num_doorbells should + 1 page (0x400 in dword)
> - */
> - if (adev->asic_type >= CHIP_VEGA10)
> - adev->doorbell.num_doorbells += 0x400;
> - }
> -
> - adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
> - adev->doorbell.num_doorbells *
> - sizeof(u32));
> - if (adev->mman.doorbell_aper_base_kaddr == NULL)
> - return -ENOMEM;
> -
> - return 0;
> -}
> -
> -/**
> - * amdgpu_device_doorbell_fini - Tear down doorbell driver information.
> - *
> - * @adev: amdgpu_device pointer
> - *
> - * Tear down doorbell driver information (CIK)
> - */
> -static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev)
> -{
> - iounmap(adev->mman.doorbell_aper_base_kaddr);
> - adev->mman.doorbell_aper_base_kaddr = NULL;
> -}
> -
> -
> -
> /*
> * amdgpu_device_wb_*()
> * Writeback is the method by which the GPU updates special pages in memory
> @@ -1239,7 +1163,6 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
> cmd & ~PCI_COMMAND_MEMORY);
>
> /* Free the VRAM and doorbell BAR, we most likely need to move both. */
> - amdgpu_device_doorbell_fini(adev);
> if (adev->asic_type >= CHIP_BONAIRE)
> pci_release_resource(adev->pdev, 2);
>
> @@ -1253,11 +1176,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
>
> pci_assign_unassigned_bus_resources(adev->pdev->bus);
>
> - /* When the doorbell or fb BAR isn't available we have no chance of
> - * using the device.
> - */
> - r = amdgpu_device_doorbell_init(adev);
> - if (r || (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET))
> + if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> + return -ENODEV;
> +
> + if (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET)
> return -ENODEV;
>
> pci_write_config_word(adev->pdev, PCI_COMMAND, cmd);
> @@ -3711,9 +3633,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> if (!adev->have_atomics_support)
> dev_info(adev->dev, "PCIE atomic ops is not supported\n");
>
> - /* doorbell bar mapping and doorbell index init*/
> - amdgpu_device_doorbell_init(adev);
> -
> if (amdgpu_emu_mode == 1) {
> /* post the asic on emulation mode */
> emu_soc_asic_init(adev);
> @@ -3941,14 +3860,14 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
> /* Clear all CPU mappings pointing to this device */
> unmap_mapping_range(adev->ddev.anon_inode->i_mapping, 0, 0, 1);
>
> - /* Unmap all mapped bars - Doorbell, registers and VRAM */
> - amdgpu_device_doorbell_fini(adev);
> -
> iounmap(adev->rmmio);
> adev->rmmio = NULL;
> if (adev->mman.vram_aper_base_kaddr)
> iounmap(adev->mman.vram_aper_base_kaddr);
> adev->mman.vram_aper_base_kaddr = NULL;
> + if (adev->mman.doorbell_aper_base_kaddr)
> + iounmap(adev->mman.doorbell_aper_base_kaddr);
> + adev->mman.doorbell_aper_base_kaddr = NULL;
>
> /* Memory manager related */
> if (!adev->gmc.xgmi.connected_to_cpu) {
> @@ -4051,7 +3970,6 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
>
> iounmap(adev->rmmio);
> adev->rmmio = NULL;
> - amdgpu_device_doorbell_fini(adev);
> drm_dev_exit(idx);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index bb2230d14ea6..983826ae7509 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1705,6 +1705,63 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
> return 0;
> }
>
> +/*
> + * GPU doorbell aperture helpers function.
> + */
> +/**
> + * amdgpu_ttm_doorbell_init - Init doorbell driver information.
> + *
> + * @adev: amdgpu_device pointer
> + *
> + * Init doorbell driver information (CIK)
> + * Returns 0 on success, error on failure.
> + */
> +static int amdgpu_ttm_doorbell_init(struct amdgpu_device *adev)
> +{
> +
> + /* No doorbell on SI hardware generation */
> + if (adev->asic_type < CHIP_BONAIRE) {
> + adev->gmc.doorbell_aper_base = 0;
> + adev->gmc.doorbell_aper_size = 0;
> + adev->doorbell.num_doorbells = 0;
> + adev->mman.doorbell_aper_base_kaddr = NULL;
> + return 0;
> + }
> +
> + if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET)
> + return -EINVAL;
> +
> + amdgpu_asic_init_doorbell_index(adev);
> +
> + /* doorbell bar mapping */
> + adev->gmc.doorbell_aper_base = pci_resource_start(adev->pdev, 2);
> + adev->gmc.doorbell_aper_size = pci_resource_len(adev->pdev, 2);
> + adev->mman.doorbell_aper_base_kaddr = ioremap(adev->gmc.doorbell_aper_base,
> + adev->gmc.doorbell_aper_size);
> +
> + if (adev->enable_mes) {
> + adev->doorbell.num_doorbells =
> + adev->gmc.doorbell_aper_size / sizeof(u32);
> + } else {
> + adev->doorbell.num_doorbells =
> + min_t(u32, adev->gmc.doorbell_aper_size / sizeof(u32),
> + adev->doorbell_index.max_assignment+1);
> + if (adev->doorbell.num_doorbells == 0)
> + return -EINVAL;
> +
> + /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> + * paging queue doorbell use the second page. The
> + * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> + * doorbells are in the first page. So with paging queue enabled,
> + * the max num_doorbells should + 1 page (0x400 in dword)
> + */
> + if (adev->asic_type >= CHIP_VEGA10)
> + adev->doorbell.num_doorbells += 0x400;
> + }
> +
> + return 0;
> +}
> +
> /*
> * amdgpu_ttm_init - Init the memory management (ttm) as well as various
> * gtt/vram related fields.
> @@ -1761,6 +1818,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> adev->gmc.visible_vram_size);
> #endif
>
> + r = amdgpu_ttm_doorbell_init(adev);
> + if (r)
> + return r;
> +
> /*
> *The reserved vram for firmware must be pinned to the specified
> *place on the VRAM, so reserve it early.
> @@ -1907,6 +1968,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
> if (adev->mman.vram_aper_base_kaddr)
> iounmap(adev->mman.vram_aper_base_kaddr);
> adev->mman.vram_aper_base_kaddr = NULL;
> + if (adev->mman.doorbell_aper_base_kaddr)
> + iounmap(adev->mman.doorbell_aper_base_kaddr);
> + adev->mman.doorbell_aper_base_kaddr = NULL;
>
> drm_dev_exit(idx);
> }
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