[PATCH] drm/amdgpu/gmc11: disable AGP aperture again

[Quan, Evan]

[AMD Official Use Only - General]

Settings for gfxhub_v3_0_3.c seem missing.

Evan
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Thursday, February 9, 2023 12:25 PM
> To: Zhang, Hawking <Hawking.Zhang at amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; amd-
> gfx at lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu/gmc11: disable AGP aperture again
> 
> Actually, nevermind, I found the bug.  New patch on the way.
> 
> Alex
> 
> On Wed, Feb 8, 2023 at 9:52 PM Zhang, Hawking <Hawking.Zhang at amd.com>
> wrote:
> >
> > [AMD Official Use Only - General]
> >
> > Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
> >
> > Regards,
> > Hawking
> > -----Original Message-----
> > From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> > Alex Deucher
> > Sent: Thursday, February 9, 2023 05:24
> > To: amd-gfx at lists.freedesktop.org
> > Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
> > Subject: [PATCH] drm/amdgpu/gmc11: disable AGP aperture again
> >
> > It seems not all of the issues with SDMA firmware have been resolved
> leading to spurious GPU page faults on some variants.
> >
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c  | 7 +++----
> >  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c    | 1 -
> >  drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c   | 7 +++----
> >  drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c | 5 +++--
> > drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c | 6 +++---
> >  5 files changed, 12 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> > index 7c069010ca9a..fa42d1907dfa 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> > @@ -151,11 +151,10 @@ static void
> gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)  {
> >         uint64_t value;
> >
> > -       /* Program the AGP BAR */
> > +       /* Disable AGP. */
> >         WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
> > -       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev-
> >gmc.agp_start >> 24);
> > -       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev-
> >gmc.agp_end >> 24);
> > -
> > +       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
> > +       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
> >
> >         /* Program the system aperture low logical page number. */
> >         WREG32_SOC15(GC, 0,
> regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> > index 0a31a341aa43..5e0018fe7e7d 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> > @@ -673,7 +673,6 @@ static void gmc_v11_0_vram_gtt_location(struct
> > amdgpu_device *adev,
> >
> >         amdgpu_gmc_vram_location(adev, &adev->gmc, base);
> >         amdgpu_gmc_gart_location(adev, mc);
> > -       amdgpu_gmc_agp_location(adev, mc);
> >
> >         /* base offset of vram pages */
> >         if (amdgpu_sriov_vf(adev))
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> > b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> > index 923fc09bc8fc..ae9cd1a4cfee 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> > @@ -177,11 +177,10 @@ static void
> mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
> >          * these regs, and they will be programed at host.
> >          * so skip programing these regs.
> >          */
> > -       /* Program the AGP BAR */
> > +       /* Disable AGP. */
> >         WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev-
> >gmc.agp_start >> 24);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev-
> >gmc.agp_end >> 24);
> > -
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
> >         /* Program the system aperture low logical page number. */
> >         WREG32_SOC15(MMHUB, 0,
> regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> >                      adev->gmc.vram_start >> 18); diff --git
> > a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> > b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> > index c8d478f2afdc..fb2f0eb72f69 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> > @@ -173,8 +173,9 @@ static void
> > mmhub_v3_0_1_init_system_aperture_regs(struct amdgpu_device *adev)
> >
> >         /* Program the AGP BAR */
> >         WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev-
> >gmc.agp_start >> 24);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev-
> >gmc.agp_end >> 24);
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
> > +
> >
> >         /*
> >          * the new L1 policy will block SRIOV guest from writing diff
> > --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> > b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> > index 51580302ec42..c30e40e52fb2 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> > @@ -162,10 +162,10 @@ static void
> mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
> >         uint64_t value;
> >         uint32_t tmp;
> >
> > -       /* Program the AGP BAR */
> > +       /* Disable AGP. */
> >         WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev-
> >gmc.agp_start >> 24);
> > -       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev-
> >gmc.agp_end >> 24);
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
> > +       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
> >
> >         if (!amdgpu_sriov_vf(adev)) {
> >                 /*
> > --
> > 2.39.1
> >