[PATCH v2 1/8] drm/amdgpu: add UAPI for allocating doorbell memory
Shashank Sharma
shashank.sharma at amd.com
Tue Feb 14 19:02:22 UTC 2023
On 14/02/2023 19:22, Christian König wrote:
> Am 14.02.23 um 17:15 schrieb Shashank Sharma:
>> From: Alex Deucher <alexander.deucher at amd.com>
>>
>> This patch adds flags for a new gem domain AMDGPU_GEM_DOMAIN_DOORBELL
>> in the UAPI layer.
>>
>> V2: Drop 'memory' from description (Christian)
>>
>> Cc: Alex Deucher <alexander.deucher at amd.com>
>> Cc: Christian Koenig <christian.koenig at amd.com>
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>> ---
>> include/uapi/drm/amdgpu_drm.h | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/uapi/drm/amdgpu_drm.h
>> b/include/uapi/drm/amdgpu_drm.h
>> index 4038abe8505a..cc5d551abda5 100644
>> --- a/include/uapi/drm/amdgpu_drm.h
>> +++ b/include/uapi/drm/amdgpu_drm.h
>> @@ -94,6 +94,9 @@ extern "C" {
>> *
>> * %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute
>> engines
>> * for appending data.
>> + *
>> + * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for
>> + * signalling user mode queues.
>
> Maybe write "for signaling events to the firmware, used especially for
> user mode queues.".
>
> With or without that Reviewed-by: Christian König
> <christian.koenig at amd.com>
>
Will add that, thanks.
- Shashank
> Christian.
>
>> */
>> #define AMDGPU_GEM_DOMAIN_CPU 0x1
>> #define AMDGPU_GEM_DOMAIN_GTT 0x2
>> @@ -101,12 +104,14 @@ extern "C" {
>> #define AMDGPU_GEM_DOMAIN_GDS 0x8
>> #define AMDGPU_GEM_DOMAIN_GWS 0x10
>> #define AMDGPU_GEM_DOMAIN_OA 0x20
>> +#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
>> #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
>> AMDGPU_GEM_DOMAIN_GTT | \
>> AMDGPU_GEM_DOMAIN_VRAM | \
>> AMDGPU_GEM_DOMAIN_GDS | \
>> AMDGPU_GEM_DOMAIN_GWS | \
>> - AMDGPU_GEM_DOMAIN_OA)
>> + AMDGPU_GEM_DOMAIN_OA | \
>> + AMDGPU_GEM_DOMAIN_DOORBELL)
>> /* Flag that CPU access will be required for the case of VRAM
>> domain */
>> #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
>
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