[PATCH] drm/amd/display: disable SubVP + DRR to prevent underflow

Rodrigo Siqueira Rodrigo.Siqueira at amd.com
Wed Feb 15 22:37:42 UTC 2023



On 2/15/23 16:59, Aurabindo Pillai wrote:
> [Why&How]
> Temporarily disable SubVP+DRR since Xorg has an architectural limitation
> where freesync will not work in a multi monitor configuration. SubVP+DRR
> requires that freesync be working.
> 
> Whether OS has variable refresh setting enabled or not, the state on
> the crtc remains same unless an application requests VRR. Due to this,
> there is no way to know whether freesync will actually work or not
> while we are on the desktop from the kernel's perspective.
> 
> If userspace does not have a limitation with multi-display freesync (for
> example wayland), then this feature can be enabled by adding a
> dcfeaturemask option to amdgpu on the kernel cmdline like:
> 
> amdgpu.dcfeaturemask=0x200
> 
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
> ---
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c    | 5 +++++
>   drivers/gpu/drm/amd/display/dc/dc.h                  | 2 +-
>   drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++++
>   drivers/gpu/drm/amd/include/amd_shared.h             | 1 +
>   4 files changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 599ee6417bce..5cb9e2b4ef2b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1604,6 +1604,11 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>   	if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0)
>   		init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 = true;
>   
> +	/* Disable SubVP + DRR config by default */
> +	init_data.flags.disable_subvp_drr = true;
> +	if (amdgpu_dc_feature_mask & DC_ENABLE_SUBVP_DRR)
> +		init_data.flags.disable_subvp_drr = false;
> +
>   	init_data.flags.seamless_boot_edp_requested = false;
>   
>   	if (check_seamless_boot_capability(adev)) {
> diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
> index 2bf0a467d45f..1fde43378689 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc.h
> @@ -409,7 +409,7 @@ struct dc_config {
>   	bool force_bios_enable_lttpr;
>   	uint8_t force_bios_fixed_vs;
>   	int sdpif_request_limit_words_per_umc;
> -
> +	bool disable_subvp_drr;
>   };
>   
>   enum visual_confirm {
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
> index 3372ede2dc28..e47828e3b6d5 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
> @@ -880,6 +880,10 @@ static bool subvp_drr_schedulable(struct dc *dc, struct dc_state *context, struc
>   	int16_t stretched_drr_us = 0;
>   	int16_t drr_stretched_vblank_us = 0;
>   	int16_t max_vblank_mallregion = 0;
> +	const struct dc_config *config = &dc->config;
> +
> +	if (config->disable_subvp_drr)
> +		return false;
>   
>   	// Find SubVP pipe
>   	for (i = 0; i < dc->res_pool->pipe_count; i++) {
> diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
> index f175e65b853a..e4a22c68517d 100644
> --- a/drivers/gpu/drm/amd/include/amd_shared.h
> +++ b/drivers/gpu/drm/amd/include/amd_shared.h
> @@ -240,6 +240,7 @@ enum DC_FEATURE_MASK {
>   	DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
>   	DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default
>   	DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default
> +	DC_ENABLE_SUBVP_DRR = (1 << 9), // 0x200, disabled by default
>   };
>   
>   enum DC_DEBUG_MASK {

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>


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