[PATCH 1/2] drm/amdgpu: return the PCIe gen and lanes from the INFO
Christian König
ckoenig.leichtzumerken at gmail.com
Tue Jan 3 08:31:26 UTC 2023
Sure they can, those files are accessible to everyone.
The massive advantage is that this is standard for all PCIe devices, so
it should work vendor independent.
Christian.
Am 02.01.23 um 18:55 schrieb Marek Olšák:
> Userspace drivers can't access sysfs.
>
> Marek
>
> On Mon, Jan 2, 2023, 10:54 Christian König
> <ckoenig.leichtzumerken at gmail.com> wrote:
>
> That stuff is already available as current_link_speed and
> current_link_width in sysfs.
>
> I'm a bit reluctant duplicating this information in the IOCTL
> interface.
>
> Christian.
>
> Am 30.12.22 um 23:07 schrieb Marek Olšák:
>> For computing PCIe bandwidth in userspace and troubleshooting PCIe
>> bandwidth issues.
>>
>> For example, my Navi21 has been limited to PCIe gen 1 and this is
>> the first time I noticed it after 2 years.
>>
>> Note that this intentionally fills a hole and padding
>> in drm_amdgpu_info_device.
>>
>> Signed-off-by: Marek Olšák <marek.olsak at amd.com>
>>
>> The patch is attached.
>>
>> Marek
>>
>
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