[PATCH] drm/amdgpu: Use the sched from entity for amdgpu_cs trace

Christian König ckoenig.leichtzumerken at gmail.com
Mon Jan 16 16:33:33 UTC 2023


Am 16.01.23 um 17:16 schrieb Leo Liu:
> The problem is that base sched hasn't been assigned yet at this moment, causing something like "ring=0"
> all the time from trace.
>           mpv:cs0-3473    [002] .....   129.047431: amdgpu_cs: bo_list=ffff92ffb3070400, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [002] .....   129.089125: amdgpu_cs: bo_list=ffff92ffba4b7000, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [002] .....   129.130987: amdgpu_cs: bo_list=ffff92ff84831c00, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [002] .....   129.172478: amdgpu_cs: bo_list=ffff92ffa4b84c00, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.214000: amdgpu_cs: bo_list=ffff92ffb405b400, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.255763: amdgpu_cs: bo_list=ffff92ffba4b7000, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.297316: amdgpu_cs: bo_list=ffff92ffa4b84c00, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.338978: amdgpu_cs: bo_list=ffff92ff84831c00, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.380685: amdgpu_cs: bo_list=ffff92ffba4b7000, ring=0, dw=48, fences=0
>           mpv:cs0-3473    [003] .....   129.421993: amdgpu_cs: bo_list=ffff92ffdb4c3400, ring=0, dw=48, fences=0
>
> Fixes: 4624459c84d7 ("drm/amdgpu: add gang submit frontend v6")
> Signed-off-by: Leo Liu <leo.liu at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> index 5e6ddc7e101c..6cd6ea765d37 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
> @@ -153,10 +153,10 @@ TRACE_EVENT(amdgpu_cs,
>   
>   	    TP_fast_assign(
>   			   __entry->bo_list = p->bo_list;
> -			   __entry->ring = to_amdgpu_ring(job->base.sched)->idx;
> +			   __entry->ring = to_amdgpu_ring(job->base.entity->rq->sched)->idx;
>   			   __entry->dw = ib->length_dw;
>   			   __entry->fences = amdgpu_fence_count_emitted(
> -				to_amdgpu_ring(job->base.sched));
> +				to_amdgpu_ring(job->base.entity->rq->sched));
>   			   ),
>   	    TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
>   		      __entry->bo_list, __entry->ring, __entry->dw,



More information about the amd-gfx mailing list