[PATCH Review V3 2/2] drm/amdgpu: Disable RAS by default on APU flatform

[Zhou1, Tao]

[AMD Official Use Only - General]

The series is:

Reviewed-by: Tao Zhou <tao.zhou1 at amd.com>

> -----Original Message-----
> From: Stanley.Yang <Stanley.Yang at amd.com>
> Sent: Friday, July 14, 2023 11:42 AM
> To: amd-gfx at lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang at amd.com>;
> Zhou1, Tao <Tao.Zhou1 at amd.com>; Chai, Thomas <YiPeng.Chai at amd.com>; Li,
> Candice <Candice.Li at amd.com>
> Cc: Yang, Stanley <Stanley.Yang at amd.com>
> Subject: [PATCH Review V3 2/2] drm/amdgpu: Disable RAS by default on APU
> flatform
>
> Disable RAS feature by default for aqua vanjaram on APU platform.
>
> Changed from V1:
>       Splite Disable RAS by default on APU platform into a
>       separated patch.
>
> Changed from V2:
>       Avoid to modify global variable amdgpu_ras_enable.
>
> Signed-off-by: Stanley.Yang <Stanley.Yang at amd.com>
> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 8673d9790bb0..c46e0ed9165e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -2524,8 +2524,17 @@ static void amdgpu_ras_check_supported(struct
> amdgpu_device *adev)
>       /* hw_supported needs to be aligned with RAS block mask. */
>       adev->ras_hw_enabled &= AMDGPU_RAS_BLOCK_MASK;
>
> -     adev->ras_enabled = amdgpu_ras_enable == 0 ? 0 :
> -             adev->ras_hw_enabled & amdgpu_ras_mask;
> +
> +     /*
> +      * Disable ras feature for aqua vanjaram
> +      * by default on apu platform.
> +      */
> +     if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 6))
> +             adev->ras_enabled = amdgpu_ras_enable != 1 ? 0 :
> +                     adev->ras_hw_enabled & amdgpu_ras_mask;
> +     else
> +             adev->ras_enabled = amdgpu_ras_enable == 0 ? 0 :
> +                     adev->ras_hw_enabled & amdgpu_ras_mask;
>  }
>
>  static void amdgpu_ras_counte_dw(struct work_struct *work)
> --
> 2.25.1