[PATCH] drm/amdgpu: enable SDMA MGCG for SDMA 5.2.x

[Alex Deucher]

On Thu, Jul 27, 2023 at 5:49 AM Prike Liang <Prike.Liang at amd.com> wrote:
>
> Now the SDMA firmware support SDMA MGCG properly,
> so let's enable it from the driver side.
>
> Signed-off-by: Prike Liang <Prike.Liang at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/nv.c        |  6 ++++--
>  drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 27 +++++++++++++++++++++++++-
>  2 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index 877989278290..e768ea34a2da 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -902,7 +902,8 @@ static int nv_common_early_init(void *handle)
>                         AMD_CG_SUPPORT_ATHUB_LS |
>                         AMD_CG_SUPPORT_IH_CG |
>                         AMD_CG_SUPPORT_VCN_MGCG |
> -                       AMD_CG_SUPPORT_JPEG_MGCG;
> +                       AMD_CG_SUPPORT_JPEG_MGCG |
> +                       AMD_CG_SUPPORT_SDMA_MGCG;
>                 adev->pg_flags = AMD_PG_SUPPORT_GFX_PG |
>                         AMD_PG_SUPPORT_VCN |
>                         AMD_PG_SUPPORT_VCN_DPG |
> @@ -963,7 +964,8 @@ static int nv_common_early_init(void *handle)
>                         AMD_CG_SUPPORT_ATHUB_LS |
>                         AMD_CG_SUPPORT_IH_CG |
>                         AMD_CG_SUPPORT_VCN_MGCG |
> -                       AMD_CG_SUPPORT_JPEG_MGCG;
> +                       AMD_CG_SUPPORT_JPEG_MGCG |
> +                       AMD_CG_SUPPORT_SDMA_MGCG;
>                 adev->pg_flags = AMD_PG_SUPPORT_VCN |
>                         AMD_PG_SUPPORT_VCN_DPG |
>                         AMD_PG_SUPPORT_JPEG |
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> index 809eca54fc61..9779e146d37e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> @@ -1571,6 +1571,30 @@ static int sdma_v5_2_process_illegal_inst_irq(struct amdgpu_device *adev,
>         return 0;
>  }
>
> +static bool sdma_v5_2_firmware_mgcg_support(struct amdgpu_device *adev,
> +                                                    int i)
> +{
> +       switch (adev->ip_versions[SDMA0_HWIP][0]) {
> +       case IP_VERSION(5, 2, 1):
> +               if (adev->sdma.instance[i].fw_version < 70)
> +                       return false;
> +               break;
> +       case IP_VERSION(5, 2, 3):
> +               if (adev->sdma.instance[i].fw_version < 47)
> +                       return false;
> +               break;
> +       case IP_VERSION(5, 2, 7):
> +               if (adev->sdma.instance[i].fw_version < 9)
> +                       return false;
> +               break;
> +       default:
> +               return true;
> +       }
> +
> +       return true;
> +
> +}
> +
>  static void sdma_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *adev,
>                                                        bool enable)
>  {
> @@ -1579,7 +1603,7 @@ static void sdma_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *ade
>
>         for (i = 0; i < adev->sdma.num_instances; i++) {
>
> -               if (adev->sdma.instance[i].fw_version < 70 && adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(5, 2, 1))
> +               if (!sdma_v5_2_firmware_mgcg_support(adev, i))
>                         adev->cg_flags &= ~AMD_CG_SUPPORT_SDMA_MGCG;
>
>                 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) {
> @@ -1653,6 +1677,7 @@ static int sdma_v5_2_set_clockgating_state(void *handle,
>         case IP_VERSION(5, 2, 5):
>         case IP_VERSION(5, 2, 6):
>         case IP_VERSION(5, 2, 3):
> +       case IP_VERSION(5, 2, 7):
>                 sdma_v5_2_update_medium_grain_clock_gating(adev,
>                                 state == AMD_CG_STATE_GATE);
>                 sdma_v5_2_update_medium_grain_light_sleep(adev,
> --
> 2.34.1
>