[PATCH v2] drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+

[Rodrigo Siqueira Jordao]

On 6/2/23 09:01, Aurabindo Pillai wrote:
> For FPO/FAMS, DMCUB will try to change the output timings by writing to
> the OTG registers. However, the timings written directly to the OTG
> registers will not be honoured unless VMIN/VMAX selector registers are
> programmed with the right bits and trigger source is selected correctly.
> Proper solution needs to go into DMCUB but will require additional state
> tracking to ensure that the selectors are set and reset correctly as per
> driver state. Until fix is merged into firmware, apply the workaround in
> driver to unconditionally write OTG vmin/vmax selectors.
> 
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
> ---
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 15 +++------------
>   drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 10 ++++++++++
>   2 files changed, 13 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> index e1975991e075..633989fd2514 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
> @@ -930,19 +930,10 @@ void optc1_set_drr(
>   				OTG_FORCE_LOCK_ON_EVENT, 0,
>   				OTG_SET_V_TOTAL_MIN_MASK_EN, 0,
>   				OTG_SET_V_TOTAL_MIN_MASK, 0);
> -
> -		// Setup manual flow control for EOF via TRIG_A
> -		optc->funcs->setup_manual_trigger(optc);
> -
> -	} else {
> -		REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
> -				OTG_SET_V_TOTAL_MIN_MASK, 0,
> -				OTG_V_TOTAL_MIN_SEL, 0,
> -				OTG_V_TOTAL_MAX_SEL, 0,
> -				OTG_FORCE_LOCK_ON_EVENT, 0);
> -
> -		optc->funcs->set_vtotal_min_max(optc, 0, 0);
>   	}
> +
> +	// Setup manual flow control for EOF via TRIG_A
> +	optc->funcs->setup_manual_trigger(optc);
>   }
>   
>   void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> index e0edc163d767..8a93cba64630 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
> @@ -455,6 +455,16 @@ void optc2_setup_manual_trigger(struct timing_generator *optc)
>   {
>   	struct optc *optc1 = DCN10TG_FROM_TG(optc);
>   
> +	/* Set the min/max selectors unconditionally so that
> +	 * DMCUB fw may change OTG timings when necessary
> +	 * TODO: Remove the w/a after fixing the issue in DMCUB firmware
> +	 */
> +	REG_UPDATE_4(OTG_V_TOTAL_CONTROL,
> +		    OTG_V_TOTAL_MIN_SEL, 1,
> +		    OTG_V_TOTAL_MAX_SEL, 1,
> +		    OTG_FORCE_LOCK_ON_EVENT, 0,
> +		    OTG_SET_V_TOTAL_MIN_MASK, (1 << 1)); /* TRIGA */
> +
>   	REG_SET_8(OTG_TRIGA_CNTL, 0,
>   			OTG_TRIGA_SOURCE_SELECT, 21,
>   			OTG_TRIGA_SOURCE_PIPE_SELECT, optc->inst,

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>