[PATCH umr 02/17] Use the correct prefix for Navi3 in halt_waves

[Haehnle, Nicolai]

[Public]


This shouldn't be necessary as it tries both mm and then reg...

Yeah I know, but it just seemed cleaner that way...
________________________________
From: StDenis, Tom <Tom.StDenis at amd.com>
Sent: Tuesday, June 6, 2023 13:34
To: Haehnle, Nicolai <Nicolai.Haehnle at amd.com>; amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Subject: Re: [PATCH umr 02/17] Use the correct prefix for Navi3 in halt_waves

[Public]

This shouldn't be necessary as it tries both mm and then reg...


________________________________________
From: Haehnle, Nicolai <Nicolai.Haehnle at amd.com>
Sent: Tuesday, June 6, 2023 05:17
To: amd-gfx at lists.freedesktop.org; StDenis, Tom
Cc: Haehnle, Nicolai
Subject: [PATCH umr 02/17] Use the correct prefix for Navi3 in halt_waves

Signed-off-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
 src/lib/sq_cmd_halt_waves.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/lib/sq_cmd_halt_waves.c b/src/lib/sq_cmd_halt_waves.c
index 368e701..841b1d3 100644
--- a/src/lib/sq_cmd_halt_waves.c
+++ b/src/lib/sq_cmd_halt_waves.c
@@ -36,21 +36,22 @@ int umr_sq_cmd_halt_waves(struct umr_asic *asic, enum umr_sq_cmd_halt_resume mod
        uint32_t value;
        uint64_t addr;
        struct {
                uint32_t se, sh, instance, use_grbm;
        } grbm;

        // SQ_CMD is not present on SI
        if (asic->family == FAMILY_SI)
                return 0;

-       reg = umr_find_reg_data_by_ip_by_instance(asic, "gfx", asic->options.vm_partition, "mmSQ_CMD");
+       reg = umr_find_reg_data_by_ip_by_instance(asic, "gfx", asic->options.vm_partition,
+                                                 asic->family >= FAMILY_GFX11 ? "regSQ_CMD" : "mmSQ_CMD");
        if (!reg) {
                asic->err_msg("[BUG]: Cannot find SQ_CMD register in umr_sq_cmd_halt_waves()\n");
                return -1;
        }

        // compose value
        if (asic->family == FAMILY_CIK) {
                value = umr_bitslice_compose_value(asic, reg, "CMD", mode == UMR_SQ_CMD_HALT ? 1 : 2); // SETHALT
        } else {
                value = umr_bitslice_compose_value(asic, reg, "CMD", 1); // SETHALT
--
2.40.0

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