[PATCH v2] drm/amd/display: Fix guarding of 'if (dc->debug.visual_confirm)'
Hamza Mahfooz
hamza.mahfooz at amd.com
Tue Jun 6 15:28:58 UTC 2023
On 6/6/23 09:11, Srinivasan Shanmugam wrote:
> Presumably the author intended to guard the for loop with
> condition 'dc->res_pool->pipe_count' under 'if (dc->debug.visual_confirm)'
> so that's what I'm changing the code to. Hopefully to do the right thing.
>
> Fixes the below compilation error:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3546:3: error: misleading indentation; statement is not part of the previous 'if' [-Werror,-Wmisleading-indentation]
> for (i = 0; i < surface_count; i++) {
> ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3538:2: note: previous statement is here
> if (dc->debug.visual_confirm)
> ^
>
> 'Fixes: 25e1a6115fc2e ("drm/amd/display: Refactor fast update to use new
> HWSS build sequence")'
replace the lines above with:
Fixes: 25e1a6115fc2e ("drm/amd/display: Refactor fast update to use new
HWSS build sequence")
With that:
Reviewed-by: Hamza Mahfooz <hamza.mahfooz at amd.com>
> Suggested-by: Alvin Lee <alvin.lee2 at amd.com>
> Cc: Stylon Wang <stylon.wang at amd.com>
> Cc: Alvin Lee <alvin.lee2 at amd.com>
> Cc: Jun Lei <jun.lei at amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
> Cc: Aurabindo Pillai <aurabindo.pillai at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>
> ---
> v2:
> - Guard only 'dc->res_pool->pipe_count' under 'if
> (dc->debug.visual_confirm)' (Alvin)
> - Fix indentation issues for forloop with
> condition 'surface_count'
>
> drivers/gpu/drm/amd/display/dc/core/dc.c | 37 +++++++++++++-----------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
> index 5e18fc0c79d6..51fbf04a9901 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
> @@ -3534,32 +3534,35 @@ static void commit_planes_for_stream_fast(struct dc *dc,
> }
> }
>
> - if (dc->debug.visual_confirm)
> + if (dc->debug.visual_confirm) {
> for (i = 0; i < dc->res_pool->pipe_count; i++) {
> struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
>
> if (pipe->stream && pipe->plane_state)
> dc_update_viusal_confirm_color(dc, context, pipe);
> }
> + }
>
> - for (i = 0; i < surface_count; i++) {
> - struct dc_plane_state *plane_state = srf_updates[i].surface;
> - /*set logical flag for lock/unlock use*/
> - for (j = 0; j < dc->res_pool->pipe_count; j++) {
> - struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
> - if (!pipe_ctx->plane_state)
> - continue;
> - if (should_update_pipe_for_plane(context, pipe_ctx, plane_state))
> - continue;
> - pipe_ctx->plane_state->triplebuffer_flips = false;
> - if (update_type == UPDATE_TYPE_FAST &&
> - dc->hwss.program_triplebuffer != NULL &&
> - !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) {
> - /*triple buffer for VUpdate only*/
> - pipe_ctx->plane_state->triplebuffer_flips = true;
> - }
> + for (i = 0; i < surface_count; i++) {
> + struct dc_plane_state *plane_state = srf_updates[i].surface;
> + /*set logical flag for lock/unlock use*/
> + for (j = 0; j < dc->res_pool->pipe_count; j++) {
> + struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
> +
> + if (!pipe_ctx->plane_state)
> + continue;
> + if (should_update_pipe_for_plane(context, pipe_ctx, plane_state))
> + continue;
> + pipe_ctx->plane_state->triplebuffer_flips = false;
> + if (update_type == UPDATE_TYPE_FAST &&
> + dc->hwss.program_triplebuffer &&
> + !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) {
> + /*triple buffer for VUpdate only*/
> + pipe_ctx->plane_state->triplebuffer_flips = true;
> }
> }
> + }
> +
> build_dmub_cmd_list(dc,
> srf_updates,
> surface_count,
--
Hamza
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