[v2] drm/amd/pm: Fix sienna cichlid incorrect OD volage after resume
Limonciello, Mario
mario.limonciello at amd.com
Mon Mar 6 19:49:35 UTC 2023
On 3/4/2023 17:44, Błażej Szczygieł wrote:
> Always setup overdrive tables after resume. Preserve only some
> user-defined settings in user_overdrive_table if they're set.
>
> Copy restored user_overdrive_table into od_table to get correct
> values.
>
> Signed-off-by: Błażej Szczygieł <mumei6102 at gmail.com>
> ---
> .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 43 ++++++++++++++-----
> 1 file changed, 33 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index 697e98a0a20a..75f18681e984 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -2143,16 +2143,9 @@ static int sienna_cichlid_set_default_od_settings(struct smu_context *smu)
> (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
> OverDriveTable_t *user_od_table =
> (OverDriveTable_t *)smu->smu_table.user_overdrive_table;
> + OverDriveTable_t user_od_table_bak;
> int ret = 0;
>
> - /*
> - * For S3/S4/Runpm resume, no need to setup those overdrive tables again as
> - * - either they already have the default OD settings got during cold bootup
> - * - or they have some user customized OD settings which cannot be overwritten
> - */
> - if (smu->adev->in_suspend)
> - return 0;
> -
> ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE,
> 0, (void *)boot_od_table, false);
> if (ret) {
> @@ -2163,7 +2156,23 @@ static int sienna_cichlid_set_default_od_settings(struct smu_context *smu)
> sienna_cichlid_dump_od_table(smu, boot_od_table);
>
> memcpy(od_table, boot_od_table, sizeof(OverDriveTable_t));
> - memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
> +
> + /*
> + * For S3/S4/Runpm resume, we need to setup those overdrive tables again,
> + * but we have to preserve user defined values in "user_od_table".
> + */
> + if (!smu->adev->in_suspend) {
> + memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
> + smu->user_dpm_profile.user_od = false;
> + } else if (smu->user_dpm_profile.user_od) {
> + memcpy(&user_od_table_bak, user_od_table, sizeof(OverDriveTable_t));
> + memcpy(user_od_table, boot_od_table, sizeof(OverDriveTable_t));
> + user_od_table->GfxclkFmin = user_od_table_bak.GfxclkFmin;
> + user_od_table->GfxclkFmax = user_od_table_bak.GfxclkFmax;
> + user_od_table->UclkFmin = user_od_table_bak.UclkFmin;
> + user_od_table->UclkFmax = user_od_table_bak.UclkFmax;
> + user_od_table->VddGfxOffset = user_od_table_bak.VddGfxOffset;
> + }
>
> return 0;
> }
> @@ -2373,6 +2382,20 @@ static int sienna_cichlid_od_edit_dpm_table(struct smu_context *smu,
> return ret;
> }
>
> +static int sienna_cichlid_restore_user_od_settings(struct smu_context *smu)
> +{
> + struct smu_table_context *table_context = &smu->smu_table;
> + OverDriveTable_t *od_table = table_context->overdrive_table;
> + OverDriveTable_t *user_od_table = table_context->user_overdrive_table;
> + int res;
> +
> + res = smu_v11_0_restore_user_od_settings(smu);
> + if (res == 0)
> + memcpy(od_table, user_od_table, sizeof(OverDriveTable_t));
> +
> + return res;
> +}
> +
> static int sienna_cichlid_run_btc(struct smu_context *smu)
> {
> int res;
> @@ -4400,7 +4423,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
> .set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
> .set_default_od_settings = sienna_cichlid_set_default_od_settings,
> .od_edit_dpm_table = sienna_cichlid_od_edit_dpm_table,
> - .restore_user_od_settings = smu_v11_0_restore_user_od_settings,
> + .restore_user_od_settings = sienna_cichlid_restore_user_od_settings,
Rather than introduce a new static function perhaps it would be better
to just change 'smu_v11_0_restore_user_od_settings'.
That could help this issue if it also occurs on Navi10 as well.
> .run_btc = sienna_cichlid_run_btc,
> .set_power_source = smu_v11_0_set_power_source,
> .get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
More information about the amd-gfx
mailing list