[PATCH] drm/amdgpu: skip ASIC reset for GC IP v11.0.4/11 when go to S4

[Huang, Tim]

[AMD Official Use Only - General]

Please ignore this patch, will send out a new one to skip ASIC reset for all APUs. Thanks.

-----Original Message-----
From: Huang, Tim <Tim.Huang at amd.com>
Sent: Monday, March 13, 2023 7:42 PM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>; Du, Xiaojian <Xiaojian.Du at amd.com>; Ma, Li <Li.Ma at amd.com>; Limonciello, Mario <Mario.Limonciello at amd.com>; Huang, Tim <Tim.Huang at amd.com>
Subject: [PATCH] drm/amdgpu: skip ASIC reset for GC IP v11.0.4/11 when go to S4

[Why]
For GC IP v11.0.4/11, PSP TMR need to be reserved for ASIC mode2 reset. But for S4, when psp suspend, it will destroy the TMR that fails the ASIC reset.

[  96.006101] amdgpu 0000:62:00.0: amdgpu: MODE2 reset [  100.409717] amdgpu 0000:62:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x00000011 SMN_C2PMSG_82:0x00000002 [  100.411593] amdgpu 0000:62:00.0: amdgpu: Mode2 reset failed!
[  100.412470] amdgpu 0000:62:00.0: PM: pci_pm_freeze(): amdgpu_pmops_freeze+0x0/0x50 [amdgpu] returns -62 [  100.414020] amdgpu 0000:62:00.0: PM: dpm_run_callback(): pci_pm_freeze+0x0/0xd0 returns -62 [  100.415311] amdgpu 0000:62:00.0: PM: pci_pm_freeze+0x0/0xd0 returned -62 after 4623202 usecs [  100.416608] amdgpu 0000:62:00.0: PM: failed to freeze async: error -62

[How]
Skip the ASIC reset for S4, assuming we can resume properly without reset.

Signed-off-by: Tim Huang <tim.huang at amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 8fa9a36c38b6..ba02b0d9ef7e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -980,6 +980,8 @@ static int smu_v13_0_4_set_performance_level(struct smu_context *smu,

 static int smu_v13_0_4_mode2_reset(struct smu_context *smu)  {
+       if (!amdgpu_in_reset(smu->adev)) /* Skip the reset for S4 */
+               return 0;
        return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
                                               SMU_RESET_MODE_2, NULL);
 }
--
2.25.1