[PATCH] drm/amdgpu: add mes resume when do gfx post soft reset

[Alex Deucher]

On Wed, Mar 15, 2023 at 4:13 AM Tong Liu01 <Tong.Liu01 at amd.com> wrote:
>
> [why]
> when gfx do soft reset, mes will also do reset, if mes is not
> resumed when do recover from soft reset, mes is unable to respond
> in later sequence
>
> [how]
> resume mes when do gfx post soft reset
>
> Signed-off-by: Tong Liu01 <Tong.Liu01 at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 3bf697a80cf2..08650f93f210 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -4655,6 +4655,14 @@ static bool gfx_v11_0_check_soft_reset(void *handle)
>         return false;
>  }
>
> +static int gfx_v11_0_post_soft_reset(void *handle)
> +{
> +       /**
> +        * GFX soft reset will impact MES, need resume MES when do GFX soft reset
> +        */
> +       return amdgpu_mes_resume((struct amdgpu_device *)handle);
> +}
> +
>  static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
>  {
>         uint64_t clock;
> @@ -6166,6 +6174,7 @@ static const struct amd_ip_funcs gfx_v11_0_ip_funcs = {
>         .wait_for_idle = gfx_v11_0_wait_for_idle,
>         .soft_reset = gfx_v11_0_soft_reset,
>         .check_soft_reset = gfx_v11_0_check_soft_reset,
> +       .post_soft_reset = gfx_v11_0_post_soft_reset,
>         .set_clockgating_state = gfx_v11_0_set_clockgating_state,
>         .set_powergating_state = gfx_v11_0_set_powergating_state,
>         .get_clockgating_state = gfx_v11_0_get_clockgating_state,
> --
> 2.34.1
>