[PATCH 05/10] drm/amdgpu/gfx11: make job optional in emit_gfx_shadow

Alex Deucher alexander.deucher at amd.com
Fri Mar 17 17:17:43 UTC 2023


We need to emit this packet any time we emit an IB, not
just when we have a job.  When no job is present just
send all 0's to reset to the legacy state.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 34 +++++++++++++++++---------
 1 file changed, 23 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 166a3f640042..0a507b7939f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5594,17 +5594,29 @@ static void gfx_v11_0_ring_emit_gfx_shadow(struct amdgpu_ring *ring,
 	if (!adev->gfx.cp_gfx_shadow)
 		return;
 
-	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_Q_PREEMPTION_MODE, 7));
-	amdgpu_ring_write(ring, lower_32_bits(job->shadow_va));
-	amdgpu_ring_write(ring, upper_32_bits(job->shadow_va));
-	amdgpu_ring_write(ring, lower_32_bits(job->gds_va));
-	amdgpu_ring_write(ring, upper_32_bits(job->gds_va));
-	amdgpu_ring_write(ring, lower_32_bits(job->csa_va));
-	amdgpu_ring_write(ring, upper_32_bits(job->csa_va));
-	amdgpu_ring_write(ring, job->shadow_va ?
-			  PACKET3_SET_Q_PREEMPTION_MODE_IB_VMID(vmid) : 0);
-	amdgpu_ring_write(ring, job->init_shadow ?
-			  PACKET3_SET_Q_PREEMPTION_MODE_INIT_SHADOW_MEM : 0);
+	if (job) {
+		amdgpu_ring_write(ring, PACKET3(PACKET3_SET_Q_PREEMPTION_MODE, 7));
+		amdgpu_ring_write(ring, lower_32_bits(job->shadow_va));
+		amdgpu_ring_write(ring, upper_32_bits(job->shadow_va));
+		amdgpu_ring_write(ring, lower_32_bits(job->gds_va));
+		amdgpu_ring_write(ring, upper_32_bits(job->gds_va));
+		amdgpu_ring_write(ring, lower_32_bits(job->csa_va));
+		amdgpu_ring_write(ring, upper_32_bits(job->csa_va));
+		amdgpu_ring_write(ring, job->shadow_va ?
+				  PACKET3_SET_Q_PREEMPTION_MODE_IB_VMID(vmid) : 0);
+		amdgpu_ring_write(ring, job->init_shadow ?
+				  PACKET3_SET_Q_PREEMPTION_MODE_INIT_SHADOW_MEM : 0);
+	} else {
+		amdgpu_ring_write(ring, PACKET3(PACKET3_SET_Q_PREEMPTION_MODE, 7));
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_write(ring, 0);
+	}
 }
 
 static unsigned gfx_v11_0_ring_emit_init_cond_exec(struct amdgpu_ring *ring)
-- 
2.39.2



More information about the amd-gfx mailing list