[AMD Official Use Only - General]
> -----Original Message-----
> From: Wenyou Yang <WenYou.Yang at amd.com>
> Sent: Wednesday, March 22, 2023 5:16 PM
> To: Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian
> <Christian.Koenig at amd.com>; Pan, Xinhui <Xinhui.Pan at amd.com>
> Cc: Yuan, Perry <Perry.Yuan at amd.com>; Liang, Richard qi
> <Richardqi.Liang at amd.com>; Li, Ying <YING.LI at amd.com>; Liu, Kun
> <Kun.Liu2 at amd.com>; amd-gfx at lists.freedesktop.org; Yang, WenYou
> <WenYou.Yang at amd.com>
> Subject: [Resend PATCH v1 3/3] drm/amd/pm: vangogh: support to send SMT
> enable message
>
> Add the support to PPSMC_MSG_SetCClkSMTEnable(0x58) message to pmfw for
> vangogh.
>
> Signed-off-by: Wenyou Yang <WenYou.Yang at amd.com>
> ---
> .../pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h | 3 ++-
> drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++-
> .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19
> +++++++++++++++++++
> 3 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
> index 7471e2df2828..2b182dbc6f9c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_5_ppsmc.h
> @@ -111,7 +111,8 @@
> #define PPSMC_MSG_GetGfxOffStatus 0x50
> #define PPSMC_MSG_GetGfxOffEntryCount 0x51
> #define PPSMC_MSG_LogGfxOffResidency 0x52
> -#define PPSMC_Message_Count 0x53
> +#define PPSMC_MSG_SetCClkSMTEnable 0x58
> +#define PPSMC_Message_Count 0x54
>
> //Argument for PPSMC_MSG_GfxDeviceDriverReset enum { diff --git
> a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> index 297b70b9388f..820812d910bf 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
> @@ -245,7 +245,8 @@
> __SMU_DUMMY_MAP(AllowGpo), \
> __SMU_DUMMY_MAP(Mode2Reset), \
> __SMU_DUMMY_MAP(RequestI2cTransaction), \
> - __SMU_DUMMY_MAP(GetMetricsTable),
> + __SMU_DUMMY_MAP(GetMetricsTable), \
> + __SMU_DUMMY_MAP(SetCClkSMTEnable),
>
> #undef __SMU_DUMMY_MAP
> #define __SMU_DUMMY_MAP(type) SMU_MSG_##type
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 7433dcaa16e0..f0eeb42df96b 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -141,6 +141,7 @@ static struct cmn2asic_msg_mapping
> vangogh_message_map[SMU_MSG_MAX_COUNT] = {
> MSG_MAP(GetGfxOffStatus,
> PPSMC_MSG_GetGfxOffStatus, 0),
> MSG_MAP(GetGfxOffEntryCount,
> PPSMC_MSG_GetGfxOffEntryCount, 0),
> MSG_MAP(LogGfxOffResidency,
> PPSMC_MSG_LogGfxOffResidency, 0),
> + MSG_MAP(SetCClkSMTEnable,
> PPSMC_MSG_SetCClkSMTEnable,
> 0),
> };
>
> static struct cmn2asic_mapping
> vangogh_feature_mask_map[SMU_FEATURE_COUNT] = { @@ -2428,6
> +2429,23 @@ static u32 vangogh_get_gfxoff_entrycount(struct smu_context
> *smu, uint64_t *entr
> return ret;
> }
>
> +static int vangogh_set_cpu_smt_enable(struct smu_context *smu, bool
> +enable) {
> + int ret = 0;
> +
> + if (enable) {
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> +
> SMU_MSG_SetCClkSMTEnable,
> + 1, NULL);
> + } else {
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> +
> SMU_MSG_SetCClkSMTEnable,
> + 0, NULL);
> + }
> +
> + return ret;
> +}
> +
> static const struct pptable_funcs vangogh_ppt_funcs = {
>
> .check_fw_status = smu_v11_0_check_fw_status, @@ -2474,6 +2492,7
> @@ static const struct pptable_funcs vangogh_ppt_funcs = {
> .get_power_limit = vangogh_get_power_limit,
> .set_power_limit = vangogh_set_power_limit,
> .get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
> + .set_cpu_smt_enable = vangogh_set_cpu_smt_enable,
Maybe we can rename the function with cclk dpm string?
For example,
.set_cclk_pd_limit = vangogh_set_cpu_smt_enable,
Perry.
> };
>
> void vangogh_set_ppt_funcs(struct smu_context *smu)
> --
> 2.39.2