[PATCH 16/19] drm/amd/display: skip ClearPayloadIdTable if device mst_en is 0

Qingqing Zhuo qingqing.zhuo at amd.com
Fri Mar 24 06:51:08 UTC 2023


From: Peichen Huang <PeiChen.Huang at amd.com>

[Why]
Some dock and mst monitor don't like to receive ClearPayloadIdTable
when mst_en is set to 0. And it doesn't make sense to do so in source
side, either.

[How]
Not send ClearyPayloadIdTable if mst_en is 0

Reviewed-by: George Shen <George.Shen at amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo at amd.com>
Signed-off-by: Peichen Huang <PeiChen.Huang at amd.com>
---
 drivers/gpu/drm/amd/display/dc/link/link_dpms.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index aa08925d54c9..f6c5ee2d639b 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2160,6 +2160,7 @@ static enum dc_status enable_link_dp_mst(
 		struct pipe_ctx *pipe_ctx)
 {
 	struct dc_link *link = pipe_ctx->stream->link;
+	unsigned char mstm_cntl;
 
 	/* sink signal type after MST branch is MST. Multiple MST sinks
 	 * share one link. Link DP PHY is enable or training only once.
@@ -2168,7 +2169,9 @@ static enum dc_status enable_link_dp_mst(
 		return DC_OK;
 
 	/* clear payload table */
-	dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link);
+	core_link_read_dpcd(link, DP_MSTM_CTRL, &mstm_cntl, 1);
+	if (mstm_cntl & DP_MST_EN)
+		dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link);
 
 	/* to make sure the pending down rep can be processed
 	 * before enabling the link
-- 
2.34.1



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