[RFC PATCH 12/40] drm/amd/display: add plane HDR multiplier driver-private property
Harry Wentland
harry.wentland at amd.com
Tue May 9 22:55:45 UTC 2023
On 5/9/23 16:35, Joshua Ashton wrote:
> FWIW, we technically do use it right now, but it is always set to 1 in S.31.32.
>
> Before we used shaper + 3D LUT we did use it for scaling SDR content,
> but given we always have a shaper + 3D LUT it made sense for us to
> roll that into there.
>
Ah, that's good. No problem then.
Harry
> On Tue, 9 May 2023 at 20:00, Harry Wentland <harry.wentland at amd.com> wrote:
>>
>> On 5/9/23 12:54, Joshua Ashton wrote:
>>> We currently do not have a use for this as we settled on per-plane 3D
>>> LUT + Shaper, but we might end up wanting to use in our scRGB stack
>>> someday so I would like to keep it.
>>>
>>
>> uAPI should always have a userspace that uses it. But if we go
>> and put it behind an #ifdef anyways I don't mind taking this
>> if we foresee use for it in the near future. A gamescope experiment
>> showing how this can be used to scale sRGB planes would be great.
>> I assume that's sort of how you intend to use it.
>>
>> Harry
>>
>>> On Tue, 9 May 2023 at 16:37, Melissa Wen <mwen at igalia.com> wrote:
>>>>
>>>> On 05/08, Harry Wentland wrote:
>>>>>
>>>>>
>>>>> On 4/23/23 10:10, Melissa Wen wrote:
>>>>>> From: Joshua Ashton <joshua at froggi.es>
>>>>>>
>>>>>> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
>>>>>> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
>>>>>> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
>>>>>> nits for SDR content. So if you want, 203 nits for SDR content, pass in
>>>>>> (203.0 / 80.0).
>>>>>>
>>>>>
>>>>> Is gamescope intending to use this?
>>>>
>>>> I don't think so. Again, I'll double check and drop it accordingly.
>>>>
>>>> Melissa
>>>>
>>>>>
>>>>> Harry
>>>>>
>>>>>> Co-developed-by: Melissa Wen <mwen at igalia.com>
>>>>>> Signed-off-by: Melissa Wen <mwen at igalia.com>
>>>>>> Signed-off-by: Joshua Ashton <joshua at froggi.es>
>>>>>> ---
>>>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++++
>>>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 +++
>>>>>> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +++++++++
>>>>>> .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 25 ++++++++++++++-----
>>>>>> 4 files changed, 41 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>>>> index 24595906dab1..dd658f162f6f 100644
>>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
>>>>>> @@ -1326,6 +1326,12 @@ amdgpu_display_create_color_properties(struct amdgpu_device *adev)
>>>>>> return -ENOMEM;
>>>>>> adev->mode_info.plane_degamma_tf_property = prop;
>>>>>>
>>>>>> + prop = drm_property_create_range(adev_to_drm(adev),
>>>>>> + 0, "AMD_PLANE_HDR_MULT", 0, UINT_MAX);
>>>>>> + if (!prop)
>>>>>> + return -ENOMEM;
>>>>>> + adev->mode_info.plane_hdr_mult_property = prop;
>>>>>> +
>>>>>> return 0;
>>>>>> }
>>>>>> #endif
>>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
>>>>>> index ab9ce6f26c90..65a9d62ffbe4 100644
>>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
>>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
>>>>>> @@ -387,6 +387,10 @@ struct amdgpu_mode_info {
>>>>>> * linearize content with or without LUT.
>>>>>> */
>>>>>> struct drm_property *plane_degamma_tf_property;
>>>>>> + /**
>>>>>> + * @plane_hdr_mult_property:
>>>>>> + */
>>>>>> + struct drm_property *plane_hdr_mult_property;
>>>>>> #endif
>>>>>> };
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
>>>>>> index 005632c1c9ec..bb7307b9cfd5 100644
>>>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
>>>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
>>>>>> @@ -51,6 +51,7 @@
>>>>>>
>>>>>> #define AMDGPU_DMUB_NOTIFICATION_MAX 5
>>>>>>
>>>>>> +#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL)
>>>>>> /*
>>>>>> #include "include/amdgpu_dal_power_if.h"
>>>>>> #include "amdgpu_dm_irq.h"
>>>>>> @@ -736,6 +737,17 @@ struct dm_plane_state {
>>>>>> * linearize.
>>>>>> */
>>>>>> enum drm_transfer_function degamma_tf;
>>>>>> + /**
>>>>>> + * @hdr_mult:
>>>>>> + *
>>>>>> + * Multiplier to 'gain' the plane. When PQ is decoded using the fixed
>>>>>> + * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on
>>>>>> + * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously.
>>>>>> + * Therefore, 1.0 multiplier = 80 nits for SDR content. So if you
>>>>>> + * want, 203 nits for SDR content, pass in (203.0 / 80.0). Format is
>>>>>> + * S31.32 sign-magnitude.
>>>>>> + */
>>>>>> + __u64 hdr_mult;
>>>>>> #endif
>>>>>> };
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
>>>>>> index 5b458cc0781c..57169dae8b3d 100644
>>>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
>>>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
>>>>>> @@ -1321,8 +1321,10 @@ static void dm_drm_plane_reset(struct drm_plane *plane)
>>>>>> __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);
>>>>>>
>>>>>> #ifdef CONFIG_STEAM_DECK
>>>>>> - if (amdgpu_state)
>>>>>> + if (amdgpu_state) {
>>>>>> amdgpu_state->degamma_tf = DRM_TRANSFER_FUNCTION_DEFAULT;
>>>>>> + amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT;
>>>>>> + }
>>>>>> #endif
>>>>>> }
>>>>>>
>>>>>> @@ -1424,11 +1426,11 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane,
>>>>>> #ifdef CONFIG_STEAM_DECK
>>>>>> int
>>>>>> amdgpu_dm_replace_property_blob_from_id(struct drm_device *dev,
>>>>>> - struct drm_property_blob **blob,
>>>>>> - uint64_t blob_id,
>>>>>> - ssize_t expected_size,
>>>>>> - ssize_t expected_elem_size,
>>>>>> - bool *replaced)
>>>>>> + struct drm_property_blob **blob,
>>>>>> + uint64_t blob_id,
>>>>>> + ssize_t expected_size,
>>>>>> + ssize_t expected_elem_size,
>>>>>> + bool *replaced)
>>>>>> {
>>>>>> struct drm_property_blob *new_blob = NULL;
>>>>>>
>>>>>> @@ -1482,6 +1484,10 @@ dm_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
>>>>>> dm->adev->mode_info.plane_degamma_tf_property,
>>>>>> DRM_TRANSFER_FUNCTION_DEFAULT);
>>>>>> }
>>>>>> + /* HDR MULT is always available */
>>>>>> + drm_object_attach_property(&plane->base,
>>>>>> + dm->adev->mode_info.plane_hdr_mult_property,
>>>>>> + AMDGPU_HDR_MULT_DEFAULT);
>>>>>> }
>>>>>>
>>>>>> static int
>>>>>> @@ -1507,6 +1513,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
>>>>>> dm_plane_state->degamma_tf = val;
>>>>>> dm_plane_state->base.color_mgmt_changed = 1;
>>>>>> }
>>>>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) {
>>>>>> + if (dm_plane_state->hdr_mult != val) {
>>>>>> + dm_plane_state->hdr_mult = val;
>>>>>> + dm_plane_state->base.color_mgmt_changed = 1;
>>>>>> + }
>>>>>> } else {
>>>>>> drm_dbg_atomic(plane->dev,
>>>>>> "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n",
>>>>>> @@ -1533,6 +1544,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
>>>>>> dm_plane_state->degamma_lut->base.id : 0;
>>>>>> } else if (property == adev->mode_info.plane_degamma_tf_property) {
>>>>>> *val = dm_plane_state->degamma_tf;
>>>>>> + } else if (property == adev->mode_info.plane_hdr_mult_property) {
>>>>>> + *val = dm_plane_state->hdr_mult;
>>>>>> } else {
>>>>>> return -EINVAL;
>>>>>> }
>>>>>
>>>>>
>>
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