[PATCH 3/3] drm/amd/display: formatting fixes for dcn30_hwseq.c
Rodrigo Siqueira Jordao
Rodrigo.Siqueira at amd.com
Thu May 11 17:52:22 UTC 2023
On 5/11/23 09:38, Aurabindo Pillai wrote:
> Fix whitespace issues and other trivial formatting fixes
>
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
> ---
> .../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 27 ++++++++-----------
> 1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
> index c9ec158c5aa7..287b9a2bfde4 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
> @@ -90,8 +90,7 @@ bool dcn30_set_blend_lut(
> return result;
> }
>
> -static bool dcn30_set_mpc_shaper_3dlut(struct pipe_ctx *pipe_ctx,
> - const struct dc_stream_state *stream)
> +static bool dcn30_set_mpc_shaper_3dlut(struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream)
> {
> struct dpp *dpp_base = pipe_ctx->plane_res.dpp;
> int mpcc_id = pipe_ctx->plane_res.hubp->inst;
> @@ -106,14 +105,13 @@ static bool dcn30_set_mpc_shaper_3dlut(struct pipe_ctx *pipe_ctx,
> if (stream->func_shaper->type == TF_TYPE_HWPWL) {
> shaper_lut = &stream->func_shaper->pwl;
> } else if (stream->func_shaper->type == TF_TYPE_DISTRIBUTED_POINTS) {
> - cm_helper_translate_curve_to_hw_format(stream->func_shaper,
> - &dpp_base->shaper_params, true);
> + cm_helper_translate_curve_to_hw_format(stream->func_shaper, &dpp_base->shaper_params, true);
> shaper_lut = &dpp_base->shaper_params;
> }
> }
>
> if (stream->lut3d_func &&
> - stream->lut3d_func->state.bits.initialized == 1 &&
> + stream->lut3d_func->state.bits.initialized == 1 &&
> stream->lut3d_func->state.bits.rmu_idx_valid == 1) {
> if (stream->lut3d_func->state.bits.rmu_mux_num == 0)
> mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu0_mux;
> @@ -121,20 +119,18 @@ static bool dcn30_set_mpc_shaper_3dlut(struct pipe_ctx *pipe_ctx,
> mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu1_mux;
> else if (stream->lut3d_func->state.bits.rmu_mux_num == 2)
> mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu2_mux;
> +
> if (mpcc_id_projected != mpcc_id)
> BREAK_TO_DEBUGGER();
> /* find the reason why logical layer assigned a different
> * mpcc_id into acquire_post_bldn_3dlut
> */
> - acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id,
> - stream->lut3d_func->state.bits.rmu_mux_num);
> + acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, stream->lut3d_func->state.bits.rmu_mux_num);
> if (acquired_rmu != stream->lut3d_func->state.bits.rmu_mux_num)
> BREAK_TO_DEBUGGER();
>
> - result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d,
> - stream->lut3d_func->state.bits.rmu_mux_num);
> - result = mpc->funcs->program_shaper(mpc, shaper_lut,
> - stream->lut3d_func->state.bits.rmu_mux_num);
> + result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d,stream->lut3d_func->state.bits.rmu_mux_num);
> + result = mpc->funcs->program_shaper(mpc, shaper_lut, stream->lut3d_func->state.bits.rmu_mux_num);
> } else {
> // loop through the available mux and release the requested mpcc_id
> mpc->funcs->release_rmu(mpc, mpcc_id);
> @@ -208,9 +204,9 @@ bool dcn30_set_output_transfer_func(struct dc *dc,
> stream->out_transfer_func,
> &mpc->blender_params, false))
> params = &mpc->blender_params;
> - /* there are no ROM LUTs in OUTGAM */
> - if (stream->out_transfer_func->type == TF_TYPE_PREDEFINED)
> - BREAK_TO_DEBUGGER();
> + /* there are no ROM LUTs in OUTGAM */
> + if (stream->out_transfer_func->type == TF_TYPE_PREDEFINED)
> + BREAK_TO_DEBUGGER();
> }
> }
>
> @@ -893,8 +889,7 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)
> memset(&cmd, 0, sizeof(cmd));
> cmd.mall.header.type = DMUB_CMD__MALL;
> cmd.mall.header.sub_type = DMUB_CMD__MALL_ACTION_DISALLOW;
> - cmd.mall.header.payload_bytes =
> - sizeof(cmd.mall) - sizeof(cmd.mall.header);
> + cmd.mall.header.payload_bytes = sizeof(cmd.mall) - sizeof(cmd.mall.header);
>
> dm_execute_dmub_cmd(dc->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
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