[PATCH] drm/amdgpu: fix incorrect pcie_gen_mask in passthrough case

[Chen, Horace]

[AMD Official Use Only - General]

Hi Alex,

Can you help review this patch?
Currently on passthrough, GPU is also on the root bus but it is not APU. Current driver regard it as APU and limit the PCIE link speed to gen2. It causes some failure on some OCL benchmark.

Thanks & Regards,
Horace.

-----Original Message-----
From: Tong Liu01 <Tong.Liu01 at amd.com>
Sent: Tuesday, May 16, 2023 5:47 PM
To: amd-gfx at lists.freedesktop.org
Cc: Quan, Evan <Evan.Quan at amd.com>; Chen, Horace <Horace.Chen at amd.com>; Tuikov, Luben <Luben.Tuikov at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Xiao, Jack <Jack.Xiao at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>; Liu, Monk <Monk.Liu at amd.com>; Xu, Feifei <Feifei.Xu at amd.com>; Kevin Wang <Kevin1.Wang at amd.com>; Chang, HaiJun <HaiJun.Chang at amd.com>; Liu01, Tong (Esther) <Tong.Liu01 at amd.com>
Subject: [PATCH] drm/amdgpu: fix incorrect pcie_gen_mask in passthrough case

[why]
Passthrough case is treated as root bus and pcie_gen_mask is set as default value that does not support GEN 3 and GEN 4 for PCIe link speed. So PCIe link speed will be downgraded at smu hw init in passthrough condition

[how]
Move detect virtualization before get pcie info and check if it is passthrough case when set pcie_gen_mask

Signed-off-by: Tong Liu01 <Tong.Liu01 at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a9d9bbe8586b..255b0014b6a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3813,6 +3813,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base);
        DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size);

+       /* detect hw virtualization here */
+       amdgpu_detect_virtualization(adev);
+
        amdgpu_device_get_pcie_info(adev);

        if (amdgpu_mcbp)
@@ -3827,9 +3830,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        if (!adev->reset_domain)
                return -ENOMEM;

-       /* detect hw virtualization here */
-       amdgpu_detect_virtualization(adev);
-
        r = amdgpu_device_get_job_timeout_settings(adev);
        if (r) {
                dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); @@ -5589,7 +5589,7 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev)
                adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap;

        /* covers APUs as well */
-       if (pci_is_root_bus(adev->pdev->bus)) {
+       if (pci_is_root_bus(adev->pdev->bus) && !amdgpu_passthrough(adev)) {
                if (adev->pm.pcie_gen_mask == 0)
                        adev->pm.pcie_gen_mask = AMDGPU_DEFAULT_PCIE_GEN_MASK;
                if (adev->pm.pcie_mlw_mask == 0)
--
2.34.1