[PATCH 2/2] drm/amdgpu: Disable interrupt tracker on NBIOv7.9

[Alex Deucher]

Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

On Fri, May 19, 2023 at 12:42 AM Shiwu Zhang <shiwu.zhang at amd.com> wrote:
>
> From: Lijo Lazar <lijo.lazar at amd.com>
>
> Enabling nBIF interrupt history tracker prevents LCLK deep sleep,
> hence disable it
>
> Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c                        | 2 ++
>  drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_offset.h | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> index ad70086de9b5..e082f6343d20 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> @@ -432,6 +432,8 @@ static void nbio_v7_9_init_registers(struct amdgpu_device *adev)
>         WREG32_SOC15(NBIO, 0, regXCC_DOORBELL_FENCE,
>                 0xff & ~(adev->gfx.xcc_mask));
>
> +       WREG32_SOC15(NBIO, 0, regBIFC_GFX_INT_MONITOR_MASK, 0x7ff);
> +
>         inst_mask = adev->aid_mask & ~1U;
>         for_each_inst(i, inst_mask) {
>                 WREG32_SOC15_EXT(NBIO, i, regXCC_DOORBELL_FENCE, i,
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_offset.h
> index 033f2796c1e3..c8a15c8f4822 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_offset.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_offset.h
> @@ -6201,6 +6201,8 @@
>  #define regNBIF_SHUB_TODET_SYNCFLOOD_CTRL2_BASE_IDX 8
>  #define regBIFC_BME_ERR_LOG_HB                                                                          0xe8ab
>  #define regBIFC_BME_ERR_LOG_HB_BASE_IDX 8
> +#define regBIFC_GFX_INT_MONITOR_MASK                                                                    0xe8ad
> +#define regBIFC_GFX_INT_MONITOR_MASK_BASE_IDX 8
>  #define regBIFC_HRP_SDP_WRRSP_POOLCRED_ALLOC                                                            0xe8c0
>  #define regBIFC_HRP_SDP_WRRSP_POOLCRED_ALLOC_BASE_IDX 8
>  #define regBIFC_HRP_SDP_RDRSP_POOLCRED_ALLOC                                                            0xe8c1
> --
> 2.17.1
>