[PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for vangogh

[Huang, Tim]

[AMD Official Use Only - General]

Thanks Alex.

Renoir didn't use the DFPstateTable but it needs to reverse the clocks levels as well.
Will send out a new patch for Renoir.

Best Regards,
Tim

________________________________
From: Alex Deucher <alexdeucher at gmail.com>
Sent: Monday, May 22, 2023 9:19 PM
To: Huang, Tim <Tim.Huang at amd.com>
Cc: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>
Subject: Re: [PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for vangogh

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

Does Renoir need a similar fix?

Alex

On Mon, May 22, 2023 at 6:10 AM Tim Huang <Tim.Huang at amd.com> wrote:
>
> This patch reverses the DPM clocks levels output of pp_dpm_mclk
> and pp_dpm_fclk.
>
> On dGPUs and older APUs we expose the levels from lowest clocks
> to highest clocks. But for some APUs, the clocks levels that from
> the DFPstateTable are given the reversed orders by PMFW. Like the
> memory DPM clocks that are exposed by pp_dpm_mclk.
>
> It's not intuitive that they are reversed on these APUs. All tools
> and software that talks to the driver then has to know different ways
> to interpret the data depending on the asic.
>
> So we need to reverse them to expose the clocks levels from the
> driver consistently.
>
> Signed-off-by: Tim Huang <Tim.Huang at amd.com>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 7433dcaa16e0..067b4e0b026c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -582,7 +582,7 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
>         DpmClocks_t *clk_table = smu->smu_table.clocks_table;
>         SmuMetrics_legacy_t metrics;
>         struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -       int i, size = 0, ret = 0;
> +       int i, idx, size = 0, ret = 0;
>         uint32_t cur_value = 0, value = 0, count = 0;
>         bool cur_value_match_level = false;
>
> @@ -656,7 +656,8 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
>         case SMU_MCLK:
>         case SMU_FCLK:
>                 for (i = 0; i < count; i++) {
> -                       ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, &value);
> +                       idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
> +                       ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, &value);
>                         if (ret)
>                                 return ret;
>                         if (!value)
> @@ -683,7 +684,7 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
>         DpmClocks_t *clk_table = smu->smu_table.clocks_table;
>         SmuMetrics_t metrics;
>         struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -       int i, size = 0, ret = 0;
> +       int i, idx, size = 0, ret = 0;
>         uint32_t cur_value = 0, value = 0, count = 0;
>         bool cur_value_match_level = false;
>         uint32_t min, max;
> @@ -765,7 +766,8 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
>         case SMU_MCLK:
>         case SMU_FCLK:
>                 for (i = 0; i < count; i++) {
> -                       ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, &value);
> +                       idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;
> +                       ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, &value);
>                         if (ret)
>                                 return ret;
>                         if (!value)
> --
> 2.34.1
>
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