[bug report] drm/amd/display: Check clock table return

[Dan Carpenter]

Hello Rodrigo Siqueira,

This is a semi-automatic email about new static checker warnings.

The patch 4b4f21ff7f5d: "drm/amd/display: Check clock table return" 
from Aug 20, 2020, leads to the following Smatch complaint:

    drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.c:775 rn_clk_mgr_construct()
    warn: variable dereferenced before check 'ctx->dc_bios->integrated_info' (see line 743)

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.c
   742	
   743		if (ctx->dc_bios->integrated_info->memory_type == LpDdr4MemType) {
                    ^^^^^^^^^^^^^^
Not sure why Smatch is complaining about this after three years.

   744			if (clk_mgr->periodic_retraining_disabled) {
   745				rn_bw_params.wm_table = lpddr4_wm_table_with_disabled_ppt;
   746			} else {
   747				if (is_green_sardine)
   748					rn_bw_params.wm_table = lpddr4_wm_table_gs;
   749				else
   750					rn_bw_params.wm_table = lpddr4_wm_table_rn;
   751			}
   752		} else {
   753			if (is_green_sardine)
   754				rn_bw_params.wm_table = ddr4_wm_table_gs;
   755			else {
   756				if (ctx->dc->config.is_single_rank_dimm)
   757					rn_bw_params.wm_table = ddr4_1R_wm_table_rn;
   758				else
   759					rn_bw_params.wm_table = ddr4_wm_table_rn;
   760			}
   761		}
   762		/* Saved clocks configured at boot for debug purposes */
   763		rn_dump_clk_registers(&clk_mgr->base.boot_snapshot, &clk_mgr->base, &log_info);
   764	
   765		clk_mgr->base.dprefclk_khz = 600000;
   766		dce_clock_read_ss_info(clk_mgr);
   767	
   768	
   769		clk_mgr->base.bw_params = &rn_bw_params;
   770	
   771		if (pp_smu && pp_smu->rn_funcs.get_dpm_clock_table) {
   772			status = pp_smu->rn_funcs.get_dpm_clock_table(&pp_smu->rn_funcs.pp_smu, &clock_table);
   773	
   774			if (status == PP_SMU_RESULT_OK &&
   775			    ctx->dc_bios && ctx->dc_bios->integrated_info) {
                            ^^^^^^^^^^^^
Check for NULL is too late.

   776				rn_clk_mgr_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info);
   777				/* treat memory config as single channel if memory is asymmetrics. */

regards,
dan carpenter