[PATCH 05/12] drm/amd/display: Revert Fix handling duplicate planes on one stream
Hersen Wu
hersenxs.wu at amd.com
Wed Nov 1 20:08:25 UTC 2023
From: Sung Joon Kim <sungkim at amd.com>
This reverts commit 2b30049e735fce887108ed4d01726c4daf69ed3d
Reviewed-by: Aric Cyr <aric.cyr at amd.com>
Acked-by: Hersen Wu <hersenxs.wu at amd.com>
Signed-off-by: Sung Joon Kim <sungkim at amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu at amd.com>
---
.../display/dc/dml2/dml2_dc_resource_mgmt.c | 45 ++++-------
.../amd/display/dc/dml2/dml2_internal_types.h | 3 -
.../display/dc/dml2/dml2_translation_helper.c | 78 ++-----------------
.../display/dc/dml2/dml2_translation_helper.h | 2 +-
.../gpu/drm/amd/display/dc/dml2/dml2_utils.c | 18 ++---
.../drm/amd/display/dc/dml2/dml2_wrapper.c | 2 +-
6 files changed, 34 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
index 38cfea3ea755..d2046e770c50 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
@@ -55,11 +55,10 @@ struct dc_pipe_mapping_scratch {
struct dc_plane_pipe_pool pipe_pool;
};
-static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,
- unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id)
+static bool get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane,
+ unsigned int stream_id, unsigned int *plane_id)
{
int i, j;
- bool is_plane_duplicate = dml2->v20.scratch.plane_duplicate_exists;
if (!plane_id)
return false;
@@ -67,8 +66,7 @@ static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state
for (i = 0; i < state->stream_count; i++) {
if (state->streams[i]->stream_id == stream_id) {
for (j = 0; j < state->stream_status[i].plane_count; j++) {
- if (state->stream_status[i].plane_states[j] == plane &&
- (!is_plane_duplicate || (is_plane_duplicate && (j == plane_index)))) {
+ if (state->stream_status[i].plane_states[j] == plane) {
*plane_id = (i << 16) | j;
return true;
}
@@ -125,9 +123,8 @@ static struct pipe_ctx *find_master_pipe_of_plane(struct dml2_context *ctx,
unsigned int plane_id_assigned_to_pipe;
for (i = 0; i < ctx->config.dcn_pipe_count; i++) {
- if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(ctx, state, state->res_ctx.pipe_ctx[i].plane_state,
- state->res_ctx.pipe_ctx[i].stream->stream_id,
- ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id_assigned_to_pipe)) {
+ if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(state, state->res_ctx.pipe_ctx[i].plane_state,
+ state->res_ctx.pipe_ctx[i].stream->stream_id, &plane_id_assigned_to_pipe)) {
if (plane_id_assigned_to_pipe == plane_id)
return &state->res_ctx.pipe_ctx[i];
}
@@ -144,9 +141,8 @@ static unsigned int find_pipes_assigned_to_plane(struct dml2_context *ctx,
unsigned int plane_id_assigned_to_pipe;
for (i = 0; i < ctx->config.dcn_pipe_count; i++) {
- if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(ctx, state, state->res_ctx.pipe_ctx[i].plane_state,
- state->res_ctx.pipe_ctx[i].stream->stream_id,
- ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id_assigned_to_pipe)) {
+ if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(state, state->res_ctx.pipe_ctx[i].plane_state,
+ state->res_ctx.pipe_ctx[i].stream->stream_id, &plane_id_assigned_to_pipe)) {
if (plane_id_assigned_to_pipe == plane_id)
pipes[num_found++] = i;
}
@@ -613,7 +609,6 @@ static struct pipe_ctx *assign_pipes_to_plane(struct dml2_context *ctx, struct d
const struct dc_plane_state *plane,
int odm_factor,
int mpc_factor,
- int plane_index,
struct dc_plane_pipe_pool *pipe_pool,
const struct dc_state *existing_state)
{
@@ -625,7 +620,7 @@ static struct pipe_ctx *assign_pipes_to_plane(struct dml2_context *ctx, struct d
unsigned int next_pipe_to_assign;
int odm_slice, mpc_slice;
- if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {
+ if (!get_plane_id(state, plane, stream->stream_id, &plane_id)) {
ASSERT(false);
return master_pipe;
}
@@ -672,16 +667,12 @@ static void free_pipe(struct pipe_ctx *pipe)
}
static void free_unused_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state,
- const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id, int plane_index)
+ const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id)
{
int i;
- bool is_plane_duplicate = ctx->v20.scratch.plane_duplicate_exists;
-
for (i = 0; i < ctx->config.dcn_pipe_count; i++) {
if (state->res_ctx.pipe_ctx[i].plane_state == plane &&
state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id &&
- (!is_plane_duplicate || (is_plane_duplicate &&
- ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pipe_idx] == plane_index)) &&
!is_pipe_used(pool, state->res_ctx.pipe_ctx[i].pipe_idx)) {
free_pipe(&state->res_ctx.pipe_ctx[i]);
}
@@ -726,20 +717,19 @@ static void map_pipes_for_stream(struct dml2_context *ctx, struct dc_state *stat
}
static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,
- int plane_index, struct dc_pipe_mapping_scratch *scratch, const struct dc_state *existing_state)
+ struct dc_pipe_mapping_scratch *scratch, const struct dc_state *existing_state)
{
int odm_slice_index;
unsigned int plane_id;
struct pipe_ctx *master_pipe = NULL;
int i;
- if (!get_plane_id(ctx, state, plane, stream->stream_id, plane_index, &plane_id)) {
+ if (!get_plane_id(state, plane, stream->stream_id, &plane_id)) {
ASSERT(false);
return;
}
- master_pipe = assign_pipes_to_plane(ctx, state, stream, plane, scratch->odm_info.odm_factor,
- scratch->mpc_info.mpc_factor, plane_index, &scratch->pipe_pool, existing_state);
+ master_pipe = assign_pipes_to_plane(ctx, state, stream, plane, scratch->odm_info.odm_factor, scratch->mpc_info.mpc_factor, &scratch->pipe_pool, existing_state);
sort_pipes_for_splitting(&scratch->pipe_pool);
for (odm_slice_index = 0; odm_slice_index < scratch->odm_info.odm_factor; odm_slice_index++) {
@@ -765,7 +755,7 @@ static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state
}
}
- free_unused_pipes_for_plane(ctx, state, plane, &scratch->pipe_pool, stream->stream_id, plane_index);
+ free_unused_pipes_for_plane(ctx, state, plane, &scratch->pipe_pool, stream->stream_id);
}
static unsigned int get_mpc_factor(struct dml2_context *ctx,
@@ -778,7 +768,7 @@ static unsigned int get_mpc_factor(struct dml2_context *ctx,
unsigned int plane_id;
unsigned int cfg_idx;
- get_plane_id(ctx, state, status->plane_states[plane_idx], stream_id, plane_idx, &plane_id);
+ get_plane_id(state, status->plane_states[plane_idx], stream_id, &plane_id);
cfg_idx = find_disp_cfg_idx_by_plane_id(mapping, plane_id);
if (ctx->architecture == dml2_architecture_20)
return (unsigned int)disp_cfg->hw.DPPPerSurface[cfg_idx];
@@ -968,8 +958,8 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
for (plane_index = 0; plane_index < state->stream_status[stream_index].plane_count; plane_index++) {
// Planes are ordered top to bottom.
- if (get_plane_id(ctx, state, state->stream_status[stream_index].plane_states[plane_index],
- stream_id, plane_index, &plane_id)) {
+ if (get_plane_id(state, state->stream_status[stream_index].plane_states[plane_index],
+ stream_id, &plane_id)) {
plane_disp_cfg_index = find_disp_cfg_idx_by_plane_id(mapping, plane_id);
// Setup mpc_info for this plane
@@ -993,8 +983,7 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
// Clear the pool assignment scratch (which is per plane)
memset(&scratch.pipe_pool, 0, sizeof(struct dc_plane_pipe_pool));
- map_pipes_for_plane(ctx, state, state->streams[stream_index],
- state->stream_status[stream_index].plane_states[plane_index], plane_index, &scratch, existing_state);
+ map_pipes_for_plane(ctx, state, state->streams[stream_index], state->stream_status[stream_index].plane_states[plane_index], &scratch, existing_state);
} else {
// Plane ID cannot be generated, therefore no DML mapping can be performed.
ASSERT(false);
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h
index 0f2b3d112fa8..ed5b767d46e0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_internal_types.h
@@ -75,8 +75,6 @@ struct dml2_dml_to_dc_pipe_mapping {
bool dml_pipe_idx_to_stream_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];
unsigned int dml_pipe_idx_to_plane_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__];
bool dml_pipe_idx_to_plane_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];
- unsigned int dml_pipe_idx_to_plane_index[__DML2_WRAPPER_MAX_STREAMS_PLANES__];
- bool dml_pipe_idx_to_plane_index_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];
};
struct dml2_wrapper_scratch {
@@ -98,7 +96,6 @@ struct dml2_wrapper_scratch {
struct dml2_dml_to_dc_pipe_mapping dml_to_dc_pipe_mapping;
bool enable_flexible_pipe_mapping;
- bool plane_duplicate_exists;
};
struct dml2_helper_det_policy_scratch {
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
index eec4799bed61..159a0956893f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
@@ -931,11 +931,10 @@ static unsigned int map_stream_to_dml_display_cfg(const struct dml2_context *dml
return location;
}
-static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane,
- unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id)
+static bool get_plane_id(const struct dc_state *context, const struct dc_plane_state *plane,
+ unsigned int stream_id, unsigned int *plane_id)
{
int i, j;
- bool is_plane_duplicate = dml2->v20.scratch.plane_duplicate_exists;
if (!plane_id)
return false;
@@ -943,8 +942,7 @@ static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *conte
for (i = 0; i < context->stream_count; i++) {
if (context->streams[i]->stream_id == stream_id) {
for (j = 0; j < context->stream_status[i].plane_count; j++) {
- if (context->stream_status[i].plane_states[j] == plane &&
- (!is_plane_duplicate || (is_plane_duplicate && (j == plane_index)))) {
+ if (context->stream_status[i].plane_states[j] == plane) {
*plane_id = (i << 16) | j;
return true;
}
@@ -956,13 +954,13 @@ static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *conte
}
static unsigned int map_plane_to_dml_display_cfg(const struct dml2_context *dml2, const struct dc_plane_state *plane,
- const struct dc_state *context, const struct dml_display_cfg_st *dml_dispcfg, unsigned int stream_id, int plane_index)
+ const struct dc_state *context, const struct dml_display_cfg_st *dml_dispcfg, unsigned int stream_id)
{
unsigned int plane_id;
int i = 0;
int location = -1;
- if (!get_plane_id(context->bw_ctx.dml2, context, plane, stream_id, plane_index, &plane_id)) {
+ if (!get_plane_id(context, plane, stream_id, &plane_id)) {
ASSERT(false);
return -1;
}
@@ -993,63 +991,7 @@ static void apply_legacy_svp_drr_settings(struct dml2_context *dml2, const struc
}
}
-static bool find_duplicate_plane(struct dml2_context *in_ctx, struct dc_state *state)
-{
- unsigned int i = 0;
- unsigned int j = 0;
- bool is_duplicate_plane = false;
-
- for (i = 0; i < MAX_PIPES; i++) {
- struct pipe_ctx *pipe_prev = &state->res_ctx.pipe_ctx[i];
-
- if (!pipe_prev || !pipe_prev->stream || !pipe_prev->plane_state)
- continue;
-
- for (j = i + 1; j < MAX_PIPES; j++) {
- struct pipe_ctx *pipe_next = &state->res_ctx.pipe_ctx[j];
-
- if (!pipe_next || !pipe_next->stream || !pipe_next->plane_state)
- continue;
-
- if (pipe_prev->plane_state == pipe_next->plane_state) {
- is_duplicate_plane = true;
- break;
- }
- }
- }
-
- return is_duplicate_plane;
-}
-
-static void initialize_pipe_to_plane_index_mapping(struct dc_state *state, struct dml2_dml_to_dc_pipe_mapping *dml_to_dc_pipe_mapping)
-{
- unsigned int i;
- unsigned int pipe_index = 0;
- unsigned int plane_index = 0;
-
- for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {
- struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];
-
- if (!pipe || !pipe->stream || !pipe->plane_state)
- continue;
-
- while (pipe) {
- pipe_index = pipe->pipe_idx;
-
- if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false) {
- dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index;
- plane_index++;
- dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true;
- }
-
- pipe = pipe->bottom_pipe;
- }
-
- plane_index = 0;
- }
-}
-
-void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg)
+void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, const struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg)
{
int i = 0, j = 0;
int disp_cfg_stream_location, disp_cfg_plane_location;
@@ -1059,7 +1001,6 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat
dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[i] = false;
dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[i] = false;
dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[i] = false;
- dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index_valid[i] = false;
}
//Generally these are set by referencing our latest BB/IP params in dcn32_resource.c file
@@ -1067,9 +1008,6 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat
dml_dispcfg->plane.GPUVMMaxPageTableLevels = 4;
dml_dispcfg->plane.HostVMEnable = false;
- initialize_pipe_to_plane_index_mapping(context, &dml2->v20.scratch.dml_to_dc_pipe_mapping);
- dml2->v20.scratch.plane_duplicate_exists = find_duplicate_plane(dml2, context);
-
for (i = 0; i < context->stream_count; i++) {
disp_cfg_stream_location = map_stream_to_dml_display_cfg(dml2, context->streams[i], dml_dispcfg);
@@ -1106,7 +1044,7 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat
} else {
for (j = 0; j < context->stream_status[i].plane_count; j++) {
disp_cfg_plane_location = map_plane_to_dml_display_cfg(dml2,
- context->stream_status[i].plane_states[j], context, dml_dispcfg, context->streams[i]->stream_id, j);
+ context->stream_status[i].plane_states[j], context, dml_dispcfg, context->streams[i]->stream_id);
if (disp_cfg_plane_location < 0)
disp_cfg_plane_location = dml_dispcfg->num_surfaces++;
@@ -1130,7 +1068,7 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat
dml_dispcfg->plane.BlendingAndTiming[disp_cfg_plane_location] = disp_cfg_stream_location;
- if (get_plane_id(dml2, context, context->stream_status[i].plane_states[j], context->streams[i]->stream_id, j,
+ if (get_plane_id(context, context->stream_status[i].plane_states[j], context->streams[i]->stream_id,
&dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[disp_cfg_plane_location]))
dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[disp_cfg_plane_location] = true;
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.h
index d764773938f4..dac6d27b14cd 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.h
@@ -34,7 +34,7 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
void dml2_translate_ip_params(const struct dc *in_dc, struct ip_params_st *out);
void dml2_translate_socbb_params(const struct dc *in_dc, struct soc_bounding_box_st *out);
void dml2_translate_soc_states(const struct dc *in_dc, struct soc_states_st *out, int num_states);
-void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg);
+void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, const struct dc_state *context, struct dml_display_cfg_st *dml_dispcfg);
void dml2_update_pipe_ctx_dchub_regs(struct _vcs_dpi_dml_display_rq_regs_st *rq_regs, struct _vcs_dpi_dml_display_dlg_regs_st *disp_dlg_regs, struct _vcs_dpi_dml_display_ttu_regs_st *disp_ttu_regs, struct pipe_ctx *out);
bool is_dp2p0_output_encoder(const struct pipe_ctx *pipe);
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
index 2498b8341199..69fd96f4f3b0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
@@ -209,11 +209,10 @@ static int find_dml_pipe_idx_by_plane_id(struct dml2_context *ctx, unsigned int
return -1;
}
-static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,
- unsigned int stream_id, unsigned int plane_index, unsigned int *plane_id)
+static bool get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane,
+ unsigned int stream_id, unsigned int *plane_id)
{
int i, j;
- bool is_plane_duplicate = dml2->v20.scratch.plane_duplicate_exists;
if (!plane_id)
return false;
@@ -221,8 +220,7 @@ static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state
for (i = 0; i < state->stream_count; i++) {
if (state->streams[i]->stream_id == stream_id) {
for (j = 0; j < state->stream_status[i].plane_count; j++) {
- if (state->stream_status[i].plane_states[j] == plane &&
- (!is_plane_duplicate || (is_plane_duplicate && (j == plane_index)))) {
+ if (state->stream_status[i].plane_states[j] == plane) {
*plane_id = (i << 16) | j;
return true;
}
@@ -306,9 +304,8 @@ void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *cont
* there is a need to know which DML pipe index maps to which DC pipe. The code below
* finds a dml_pipe_index from the plane id if a plane is valid. If a plane is not valid then
* it finds a dml_pipe_index from the stream id. */
- if (get_plane_id(in_ctx, context, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_state,
- context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id,
- in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[context->res_ctx.pipe_ctx[dc_pipe_ctx_index].pipe_idx], &plane_id)) {
+ if (get_plane_id(context, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_state,
+ context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id, &plane_id)) {
dml_pipe_idx = find_dml_pipe_idx_by_plane_id(in_ctx, plane_id);
} else {
dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id);
@@ -448,9 +445,8 @@ bool dml2_verify_det_buffer_configuration(struct dml2_context *in_ctx, struct dc
for (i = 0; i < MAX_PIPES; i++) {
if (!display_state->res_ctx.pipe_ctx[i].stream)
continue;
- if (get_plane_id(in_ctx, display_state, display_state->res_ctx.pipe_ctx[i].plane_state,
- display_state->res_ctx.pipe_ctx[i].stream->stream_id,
- in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[display_state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id))
+ if (get_plane_id(display_state, display_state->res_ctx.pipe_ctx[i].plane_state,
+ display_state->res_ctx.pipe_ctx[i].stream->stream_id, &plane_id))
dml_pipe_idx = find_dml_pipe_idx_by_plane_id(in_ctx, plane_id);
else
dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, display_state->res_ctx.pipe_ctx[i].stream->stream_id);
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
index 8f231418870f..0a06bf3b135a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
@@ -639,7 +639,7 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s
return result;
}
-static bool dml2_validate_only(struct dc_state *context)
+static bool dml2_validate_only(const struct dc_state *context)
{
struct dml2_context *dml2 = context->bw_ctx.dml2;
unsigned int result = 0;
--
2.25.1
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