[PATCH 12/12] drm/amd/display: Promote DAL to 3.2.259
Hersen Wu
hersenxs.wu at amd.com
Wed Nov 1 20:08:32 UTC 2023
From: Aric Cyr <aric.cyr at amd.com>
Acked-by: Hersen Wu <hersenxs.wu at amd.com>
Signed-off-by: Aric Cyr <aric.cyr at amd.com>
Summary:
- Enable DCN35 physymclk root clock gating
- Fix DP automation test pattern bug
- Disable OTG for mode switch from TMDS to FRL
- Refactor DML2
- Revert Fix handling duplicate planes on one stream
- Revert Enable DCN clock gating
- Implement cursor P-State allow for SubVP
- Optimize pipe otg allocation
- Save and restore mall state while switching from ODM to Subvp
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 09328f1670aa..c5e7da302acb 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -49,7 +49,7 @@ struct aux_payload;
struct set_config_cmd_payload;
struct dmub_notification;
-#define DC_VER "3.2.258"
+#define DC_VER "3.2.259"
#define MAX_SURFACES 3
#define MAX_PLANES 6
--
2.25.1
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