[PATCH] drm/amdgpu: Skip PCTL0_MMHUB_DEEPSLEEP_IB write in jpegv4.0.3 under SRIOV

[Dhume, Samir]

[AMD Official Use Only - General]

Reviewed-by: Samir Dhume <samir.dhume at amd.com>

-----Original Message-----
From: Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu at amd.com>
Sent: Tuesday, November 7, 2023 2:32 PM
To: amd-gfx at lists.freedesktop.org
Cc: Dhume, Samir <Samir.Dhume at amd.com>; Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu at amd.com>
Subject: [PATCH] drm/amdgpu: Skip PCTL0_MMHUB_DEEPSLEEP_IB write in jpegv4.0.3 under SRIOV

PCTL0_MMHUB_DEEPSLEEP_IB is blocked for VF access

Signed-off-by: Victor Lu <victorchengchi.lu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index 355d25fd6169..165448bed6c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
@@ -652,9 +652,11 @@ static void jpeg_v4_0_3_dec_ring_set_wptr(struct amdgpu_ring *ring)
  */
 static void jpeg_v4_0_3_dec_ring_insert_start(struct amdgpu_ring *ring)  {
-       amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
-               0, 0, PACKETJ_TYPE0));
-       amdgpu_ring_write(ring, 0x62a04); /* PCTL0_MMHUB_DEEPSLEEP_IB */
+       if (!amdgpu_sriov_vf(ring->adev)) {
+               amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
+                       0, 0, PACKETJ_TYPE0));
+               amdgpu_ring_write(ring, 0x62a04); /* PCTL0_MMHUB_DEEPSLEEP_IB */
+       }

        amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
                0, 0, PACKETJ_TYPE0));
@@ -670,9 +672,11 @@ static void jpeg_v4_0_3_dec_ring_insert_start(struct amdgpu_ring *ring)
  */
 static void jpeg_v4_0_3_dec_ring_insert_end(struct amdgpu_ring *ring)  {
-       amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
-               0, 0, PACKETJ_TYPE0));
-       amdgpu_ring_write(ring, 0x62a04);
+       if (!amdgpu_sriov_vf(ring->adev)) {
+               amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
+                       0, 0, PACKETJ_TYPE0));
+               amdgpu_ring_write(ring, 0x62a04);
+       }

        amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,
                0, 0, PACKETJ_TYPE0));
--
2.34.1