[PATCH 2/6] drm/amdgpu: add lsdma interrupt src id

[Yifan Zhang]

This patch is to add lsdma interrupt src id.

Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
Reviewed-by: Tim Huang <Tim.Huang at amd.com>
---
 .../include/ivsrcid/gfx/irqsrcs_gfx_11_0_0.h  | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_11_0_0.h b/drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_11_0_0.h
index 3a4670bc4449..164ee784b987 100644
--- a/drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_11_0_0.h
+++ b/drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_11_0_0.h
@@ -28,6 +28,26 @@
 #define GFX_11_0_0__SRCID__UTCL2_DATA_POISONING                 1       // UTCL2 for data poisoning
 
 #define GFX_11_0_0__SRCID__MEM_ACCES_MON		                10		// 0x0A EA memory access monitor interrupt
+																		//
+#define GFX_11_0_0__SRCID__LSDMA_ATOMIC_RTN_DONE                 48      // 0x30 SDMA atomic*_rtn ops complete
+#define GFX_11_0_0__SRCID__LSDMA_TRAP                            49      // 0x31 Trap
+#define GFX_11_0_0__SRCID__LSDMA_SRBMWRITE                       50      // 0x32 SRBM write Protection
+#define GFX_11_0_0__SRCID__LSDMA_CTXEMPTY                        51      // 0x33 Context Empty
+#define GFX_11_0_0__SRCID__LSDMA_FROZEN                          52      // 0x34 SDMA Frozen
+#define GFX_11_0_0__SRCID__LSDMA_PREEMPT                         53      // 0x34 SDMA New Run List
+#define GFX_11_0_0__SRCID__LSDMA_IB_PREEMPT                      54      // 0x35 sdma mid - command buffer preempt interrupt
+#define GFX_11_0_0__SRCID__LSDMA_ATOMIC_TIMEOUT                  55      // 0x38 SDMA atomic CMPSWAP loop timeout
+#define GFX_11_0_0__SRCID__LSDMA_POLL_TIMEOUT                    56      // 0x39 SRBM read poll timeout
+#define GFX_11_0_0__SRCID__LSDMA_VM_HOLE                         57      // 0x3D MC or SEM address in VM hole
+#define GFX_11_0_0__SRCID__LSDMA_NACK_GEN_ERR                    58      // 0x3D MC or SEM address in VM hole
+#define GFX_11_0_0__SRCID__LSDMA_NACK_PRT                        59      // 0x3D MC or SEM address in VM hole
+#define GFX_11_0_0__SRCID__LSDMA_ECC                             60      // 0x3E ECC Error
+#define GFX_11_0_0__SRCID__LSDMA_DOORBELL_INVALID                61      // 0x36 Doorbell BE invalid
+#define GFX_11_0_0__SRCID__LSDMA_PAGE_TIMEOUT                    62      // 0x3A Page retry  timeout after UTCL2 return nack = 1
+#define GFX_11_0_0__SRCID__LSDMA_PAGE_NULL                       63      // 0x3B Page Null from UTCL2 when nack = 2
+#define GFX_11_0_0__SRCID__LSDMA_PAGE_FAULT                      64      // 0x3C Page Fault Error from UTCL2 when nack = 3
+#define GFX_11_0_0__SRCID__LSDMA_SEM_INCOMPLETE_TIMEOUT          65      // 0x41 GPF(Sem incomplete timeout)
+#define GFX_11_0_0__SRCID__LSDMA_SEM_WAIT_FAIL_TIMEOUT           66      // 0x42 Semaphore wait fail timeout
 
 #define GFX_11_0_0__SRCID__SDMA_ATOMIC_RTN_DONE                 48      // 0x30 SDMA atomic*_rtn ops complete
 #define GFX_11_0_0__SRCID__SDMA_TRAP                            49      // 0x31 Trap
-- 
2.37.3