[PATCH] drm/amdgpu: Fix complex macros error

[Christian König]

Am 30.09.23 um 08:32 schrieb Srinivasan Shanmugam:
> Fixes the below:
>
> ERROR: Macros with complex values should be enclosed in parentheses
>
> WARNING: macros should not use a trailing semicolon
> +#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
>
> Cc: Christian König <christian.koenig at amd.com>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: "Pan, Xinhui" <Xinhui.Pan at amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h            | 2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h        | 2 +-
>   drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h          | 6 ++++--
>   4 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 73e825d20259..1ff2da1a5565 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1322,7 +1322,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
>   	((adev)->asic_funcs->update_umd_stable_pstate ? (adev)->asic_funcs->update_umd_stable_pstate((adev), (enter)) : 0)
>   #define amdgpu_asic_query_video_codecs(adev, e, c) (adev)->asic_funcs->query_video_codecs((adev), (e), (c))
>   
> -#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
> +#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter))
>   
>   #define BIT_MASK_UPPER(i) ((i) >= BITS_PER_LONG ? 0 : ~0UL << (i))
>   #define for_each_inst(i, inst_mask)        \
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> index c60d2f79eeef..65aa218380be 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> @@ -149,7 +149,7 @@
>   				       RAS_TABLE_HEADER_SIZE - \
>   				       RAS_TABLE_V2_1_INFO_SIZE) / RAS_TABLE_RECORD_SIZE)
>   
> -#define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control))->adev
> +#define to_amdgpu_device(x) ((container_of(x, struct amdgpu_ras, eeprom_control))->adev)
>   
>   static bool __is_ras_eeprom_supported(struct amdgpu_device *adev)
>   {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index a3eed90b6af0..0815c5a97564 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -33,7 +33,7 @@
>   #define AMDGPU_VCN_MAX_ENC_RINGS	3
>   
>   #define AMDGPU_MAX_VCN_INSTANCES	4
> -#define AMDGPU_MAX_VCN_ENC_RINGS  AMDGPU_VCN_MAX_ENC_RINGS * AMDGPU_MAX_VCN_INSTANCES
> +#define AMDGPU_MAX_VCN_ENC_RINGS  (AMDGPU_VCN_MAX_ENC_RINGS * AMDGPU_MAX_VCN_INSTANCES)
>   
>   #define AMDGPU_VCN_HARVEST_VCN0 (1 << 0)
>   #define AMDGPU_VCN_HARVEST_VCN1 (1 << 1)
> diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
> index af1a784696bd..c520b2fabfb9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h
> @@ -62,7 +62,9 @@ int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev);
>   int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev);
>   void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev);
>   
> -#define AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_CONTROL) * 4
> -#define AI_MAIBOX_CONTROL_RCV_OFFSET_BYTE SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_CONTROL) * 4 + 1
> +#define AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE \
> +	(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_CONTROL) * 4)
> +#define AI_MAIBOX_CONTROL_RCV_OFFSET_BYTE \
> +	(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_CONTROL) * 4 + 1)
>   
>   #endif