[PATCH v3 10/16] drm/amd/display: Split pipe for stereo timings

[Rodrigo Siqueira]

From: Taimur Hassan <syed.hassan at amd.com>

[Why & How]
DML2 did not carry over DML1 logic that splits pipe for stero timings. Pipe
splitting is needed in this case to pass stereo tests.

Reviewed-by: Charlene Liu <charlene.liu at amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo at amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo at amd.com>
Signed-off-by: Taimur Hassan <syed.hassan at amd.com>
---
 .../drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c   | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
index 8da145fd4d7b..116b78a5107c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
@@ -708,6 +708,17 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
 					// If ODM combine is not inuse, then the number of pipes
 					// per plane is determined by MPC combine factor
 					scratch.mpc_info.mpc_factor = DPPPerSurface[plane_disp_cfg_index];
+
+					//For stereo timings, we need to pipe split
+					if ((state->streams[stream_index]->view_format ==
+							VIEW_3D_FORMAT_SIDE_BY_SIDE ||
+							state->streams[stream_index]->view_format ==
+							VIEW_3D_FORMAT_TOP_AND_BOTTOM) &&
+							(state->streams[stream_index]->timing.timing_3d_format ==
+							TIMING_3D_FORMAT_TOP_AND_BOTTOM ||
+							state->streams[stream_index]->timing.timing_3d_format ==
+							TIMING_3D_FORMAT_SIDE_BY_SIDE))
+						scratch.mpc_info.mpc_factor = 2;
 				} else {
 					// If ODM combine is enabled, then we use at most 1 pipe per
 					// odm slice per plane, i.e. MPC combine is never used
-- 
2.40.1